[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp

[Misha Brukman]

Changes in directory llvm/lib/Target/Alpha:

AlphaISelPattern.cpp updated: 1.118 -> 1.119
---
Log message:

* Replace block of commented-out lines with #if 0
* Remove warning "control reaches end of non-void function"


---
Diffs of the changes:  (+29 -26)

 AlphaISelPattern.cpp |   55 ++++++++++++++++++++++++++-------------------------
 1 files changed, 29 insertions(+), 26 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.118 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.119
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.118	Tue May 31 14:49:34 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp	Mon Jun  6 12:39:46 2005
@@ -171,33 +171,36 @@
     MachineFunction &MF = DAG.getMachineFunction();
     switch (Op.getOpcode()) {
     default: assert(0 && "Should not custom lower this!");
-//     case ISD::SINT_TO_FP:
-//       {
-//         assert (Op.getOperand(0).getValueType() == MVT::i64
-//                 && "only quads can be loaded from");
-//         SDOperand SRC;
-//         if (EnableAlphaFTOI)
-//         {
-//           std::vector<MVT::ValueType> RTs;
-//           RTs.push_back(Op.getValueType());
-//           std::vector<SDOperand> Ops;
-//           Ops.push_back(Op.getOperand(0));
-//           SRC = DAG.getNode(AlphaISD::ITOF, RTs, Ops);
-//         } else {
-//           int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8);
-//           SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
-//           SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
-//                                         Op.getOperand(0), StackSlot, DAG.getSrcValue(NULL));
-//           SRC = DAG.getLoad(Op.getValueType(), Store.getValue(0), StackSlot,
-//                             DAG.getSrcValue(NULL));
-//         }
-//         std::vector<MVT::ValueType> RTs;
-//         RTs.push_back(Op.getValueType());
-//         std::vector<SDOperand> Ops;
-//         Ops.push_back(SRC);
-//         return DAG.getNode(AlphaISD::CVTQ, RTs, Ops);
-//       }
+#if 0
+    case ISD::SINT_TO_FP:
+      {
+        assert (Op.getOperand(0).getValueType() == MVT::i64
+                && "only quads can be loaded from");
+        SDOperand SRC;
+        if (EnableAlphaFTOI)
+        {
+          std::vector<MVT::ValueType> RTs;
+          RTs.push_back(Op.getValueType());
+          std::vector<SDOperand> Ops;
+          Ops.push_back(Op.getOperand(0));
+          SRC = DAG.getNode(AlphaISD::ITOF, RTs, Ops);
+        } else {
+          int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8);
+          SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
+          SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+                                        Op.getOperand(0), StackSlot, DAG.getSrcValue(NULL));
+          SRC = DAG.getLoad(Op.getValueType(), Store.getValue(0), StackSlot,
+                            DAG.getSrcValue(NULL));
+        }
+        std::vector<MVT::ValueType> RTs;
+        RTs.push_back(Op.getValueType());
+        std::vector<SDOperand> Ops;
+        Ops.push_back(SRC);
+        return DAG.getNode(AlphaISD::CVTQ, RTs, Ops);
+      }
+#endif
     }
+    return SDOperand();
 }