[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
Chris Lattner
lattner at cs.uiuc.edu
Fri Apr 29 21:27:10 PDT 2005
Changes in directory llvm/lib/Target/PowerPC:
PPC64ISelPattern.cpp updated: 1.11 -> 1.12
---
Log message:
Doesn't support these nodes
---
Diffs of the changes: (+8 -0)
PPC64ISelPattern.cpp | 8 ++++++++
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp:1.11 llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp:1.12
--- llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp:1.11 Wed Apr 27 15:10:01 2005
+++ llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp Fri Apr 29 23:26:56 2005
@@ -52,6 +52,14 @@
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
+ // We don't support sin/cos/sqrt
+ setOperationAction(ISD::FSIN , MVT::f64, Expand);
+ setOperationAction(ISD::FCOS , MVT::f64, Expand);
+ setOperationAction(ISD::FSQRT, MVT::f64, Expand);
+ setOperationAction(ISD::FSIN , MVT::f32, Expand);
+ setOperationAction(ISD::FCOS , MVT::f32, Expand);
+ setOperationAction(ISD::FSQRT, MVT::f32, Expand);
+
// PPC 64 has i16 and i32 but no i8 (or i1) SEXTLOAD
setOperationAction(ISD::SEXTLOAD, MVT::i1, Expand);
setOperationAction(ISD::SEXTLOAD, MVT::i8, Expand);
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