[llvm-commits] CVS: llvm/lib/Target/MRegisterInfo.cpp TargetInstrInfo.cpp TargetSchedInfo.cpp

[Misha Brukman]

Changes in directory llvm/lib/Target:

MRegisterInfo.cpp updated: 1.9 -> 1.10
TargetInstrInfo.cpp updated: 1.15 -> 1.16
TargetSchedInfo.cpp updated: 1.23 -> 1.24
---
Log message:

Convert tabs to spaces


---
Diffs of the changes:  (+16 -18)

 MRegisterInfo.cpp   |    2 +-
 TargetInstrInfo.cpp |   12 ++++++------
 TargetSchedInfo.cpp |   20 +++++++++-----------
 3 files changed, 16 insertions(+), 18 deletions(-)


Index: llvm/lib/Target/MRegisterInfo.cpp
diff -u llvm/lib/Target/MRegisterInfo.cpp:1.9 llvm/lib/Target/MRegisterInfo.cpp:1.10
--- llvm/lib/Target/MRegisterInfo.cpp:1.9	Thu Apr 21 17:55:34 2005
+++ llvm/lib/Target/MRegisterInfo.cpp	Fri Apr 22 12:49:49 2005
@@ -17,7 +17,7 @@
 
 MRegisterInfo::MRegisterInfo(const MRegisterDesc *D, unsigned NR,
                              regclass_iterator RCB, regclass_iterator RCE,
-			     int CFSO, int CFDO)
+                             int CFSO, int CFDO)
   : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) {
   assert(NumRegs < FirstVirtualRegister &&
          "Target has too many physical registers!");


Index: llvm/lib/Target/TargetInstrInfo.cpp
diff -u llvm/lib/Target/TargetInstrInfo.cpp:1.15 llvm/lib/Target/TargetInstrInfo.cpp:1.16
--- llvm/lib/Target/TargetInstrInfo.cpp:1.15	Thu Apr 21 17:55:34 2005
+++ llvm/lib/Target/TargetInstrInfo.cpp	Fri Apr 22 12:49:49 2005
@@ -26,21 +26,21 @@
 }
 
 TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc,
-				 unsigned numOpcodes)
+                                 unsigned numOpcodes)
   : desc(Desc), NumOpcodes(numOpcodes) {
   // FIXME: TargetInstrDescriptors should not be global
   assert(TargetInstrDescriptors == NULL && desc != NULL
          && "TargetMachine data structure corrupt; maybe you tried to create another TargetMachine? (only one may exist in a program)");
-  TargetInstrDescriptors = desc;	// initialize global variable
+  TargetInstrDescriptors = desc; // initialize global variable
 }
 
 TargetInstrInfo::~TargetInstrInfo() {
-  TargetInstrDescriptors = NULL;	// reset global variable
+  TargetInstrDescriptors = NULL; // reset global variable
 }
 
 // FIXME: SPARCV9 SPECIFIC!
 bool TargetInstrInfo::constantFitsInImmedField(MachineOpCode opCode,
-					       int64_t intValue) const {
+                                               int64_t intValue) const {
   // First, check if opCode has an immed field.
   bool isSignExtended;
   uint64_t maxImmedValue = maxImmedConstant(opCode, isSignExtended);
@@ -52,8 +52,8 @@
 
       // Now check if the constant fits
       if (intValue <= (int64_t) maxImmedValue &&
-	  intValue >= -((int64_t) maxImmedValue+1))
-	return true;
+          intValue >= -((int64_t) maxImmedValue+1))
+        return true;
     }
 
   return false;


Index: llvm/lib/Target/TargetSchedInfo.cpp
diff -u llvm/lib/Target/TargetSchedInfo.cpp:1.23 llvm/lib/Target/TargetSchedInfo.cpp:1.24
--- llvm/lib/Target/TargetSchedInfo.cpp:1.23	Thu Apr 21 17:55:34 2005
+++ llvm/lib/Target/TargetSchedInfo.cpp	Fri Apr 22 12:49:49 2005
@@ -43,7 +43,7 @@
 //
 inline static bool
 RUConflict(const std::vector<resourceId_t>& fromRVec,
-	   const std::vector<resourceId_t>& toRVec)
+           const std::vector<resourceId_t>& toRVec)
 {
 
   unsigned fN = fromRVec.size(), tN = toRVec.size();
@@ -63,7 +63,7 @@
 
 static CycleCount_t
 ComputeMinGap(const InstrRUsage &fromRU,
-	      const InstrRUsage &toRU)
+              const InstrRUsage &toRU)
 {
   CycleCount_t minGap = 0;
 
@@ -92,7 +92,7 @@
 
 //---------------------------------------------------------------------------
 // class TargetSchedInfo
-//	Interface to machine description for instruction scheduling
+// Interface to machine description for instruction scheduling
 //---------------------------------------------------------------------------
 
 TargetSchedInfo::TargetSchedInfo(const TargetMachine&    tgt,
@@ -112,8 +112,8 @@
 void
 TargetSchedInfo::initializeResources()
 {
-  assert(MAX_NUM_SLOTS >= (int)getMaxNumIssueTotal()
-	 && "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
+  assert(MAX_NUM_SLOTS >= (int)getMaxNumIssueTotal() &&
+         "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
 
   // First, compute common resource usage info for each class because
   // most instructions will probably behave the same as their class.
@@ -134,8 +134,7 @@
 
 void
 TargetSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
-					instrRUForClasses)
-{
+                                        instrRUForClasses) {
   int numOpCodes =  mii->getNumOpcodes();
   instrRUsages.resize(numOpCodes);
 
@@ -164,8 +163,7 @@
 
 void
 TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
-				   instrRUForClasses)
-{
+                                   instrRUForClasses) {
   int numOpCodes =  mii->getNumOpcodes();
   issueGaps.resize(numOpCodes);
   conflictLists.resize(numOpCodes);
@@ -206,7 +204,7 @@
 
 
 void InstrRUsage::setTo(const InstrClassRUsage& classRU) {
-  sameAsClass	= true;
+  sameAsClass   = true;
   isSingleIssue = classRU.isSingleIssue;
   breaksGroup   = classRU.breaksGroup;
   numBubbles    = classRU.numBubbles;
@@ -222,7 +220,7 @@
 
   for (unsigned i=0; i < classRU.numRUEntries; i++)
     for (unsigned c=classRU.V[i].startCycle, NC = c + classRU.V[i].numCycles;
-	 c < NC; c++)
+         c < NC; c++)
       this->resourcesByCycle[c].push_back(classRU.V[i].resourceId);
 
   // Sort each resource usage vector by resourceId_t to speed up conflict