[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelPattern.cpp updated: 1.75 -> 1.76
---
Log message:

Match another form of eqv


---
Diffs of the changes:  (+6 -1)

 PPC32ISelPattern.cpp |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.75 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.76
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.75	Mon Apr 18 02:48:09 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp	Thu Apr 21 16:09:11 2005
@@ -1899,7 +1899,7 @@
       BuildMI(BB, PPC::EQV, 2, Result).addReg(Tmp1).addReg(Tmp2);
       return Result;
     }
-    // Check for NOT, NOR, and NAND: xor (copy, or, and), -1
+    // Check for NOT, NOR, EQV, and NAND: xor (copy, or, xor, and), -1
     if (N.getOperand(1).getOpcode() == ISD::Constant &&
         cast<ConstantSDNode>(N.getOperand(1))->isAllOnesValue()) {
       switch(N.getOperand(0).getOpcode()) {
@@ -1913,6 +1913,11 @@
         Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
         BuildMI(BB, PPC::NAND, 2, Result).addReg(Tmp1).addReg(Tmp2);
         break;
+      case ISD::XOR:
+        Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
+        Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
+        BuildMI(BB, PPC::EQV, 2, Result).addReg(Tmp1).addReg(Tmp2);
+        break;
       default:
         Tmp1 = SelectExpr(N.getOperand(0));
         BuildMI(BB, PPC::NOR, 2, Result).addReg(Tmp1).addReg(Tmp1);