[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelPattern.cpp IA64InstrInfo.td

[Duraid Madina]

Changes in directory llvm/lib/Target/IA64:

IA64ISelPattern.cpp updated: 1.21 -> 1.22
IA64InstrInfo.td updated: 1.10 -> 1.11
---
Log message:

* add the shladd instruction
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once 
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)



---
Diffs of the changes:  (+23 -0)

 IA64ISelPattern.cpp |   20 ++++++++++++++++++++
 IA64InstrInfo.td    |    3 +++
 2 files changed, 23 insertions(+)


Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp
diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.21 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.22
--- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.21	Tue Apr 12 23:50:54 2005
+++ llvm/lib/Target/IA64/IA64ISelPattern.cpp	Wed Apr 13 01:12:04 2005
@@ -873,6 +873,26 @@
       BuildMI(BB, IA64::FMA, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
       return Result; // early exit
     }
+
+    if(DestType != MVT::f64 && N.getOperand(0).getOpcode() == ISD::SHL &&
+	N.getOperand(0).Val->hasOneUse()) { // if we might be able to fold
+                                            // this add into a shladd, try:
+      ConstantSDNode *CSD = NULL;
+      if((CSD = dyn_cast<ConstantSDNode>(N.getOperand(0).getOperand(1))) &&
+	  (CSD->getValue() >= 1) && (CSD->getValue() <= 4) ) { // we can:
+
+	// ++FusedSHLADD; // Statistic
+	Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
+	int shl_amt = CSD->getValue();
+	Tmp3 = SelectExpr(N.getOperand(1));
+	
+	BuildMI(BB, IA64::SHLADD, 3, Result)
+	  .addReg(Tmp1).addImm(shl_amt).addReg(Tmp3);
+	return Result; // early exit
+      }
+    }
+
+    //else, fallthrough:
     Tmp1 = SelectExpr(N.getOperand(0));
     if(DestType != MVT::f64) { // integer addition:
         switch (ponderIntegerAdditionWith(N.getOperand(1), Tmp3)) {


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.10 llvm/lib/Target/IA64/IA64InstrInfo.td:1.11
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.10	Tue Apr 12 10:12:19 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Wed Apr 13 01:12:04 2005
@@ -111,6 +111,9 @@
 def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
   "shr $dst = $src1, $imm;;">;
 
+def SHLADD : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm, GR:$src2), 
+  "shladd $dst = $src1, $imm, $src2;;">;
+
 def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),
   "extr.u $dst = $src1, $imm1, $imm2;;">;