[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Chris Lattner
lattner at cs.uiuc.edu
Tue Apr 12 19:36:58 PDT 2005
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.31 -> 1.32
---
Log message:
Remove the ZERO_EXTEND_INREG node which is redundant with AND
---
Diffs of the changes: (+5 -7)
SelectionDAGNodes.h | 12 +++++-------
1 files changed, 5 insertions(+), 7 deletions(-)
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.31 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.32
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.31 Fri Apr 8 22:21:50 2005
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Tue Apr 12 21:36:41 2005
@@ -141,13 +141,12 @@
SINT_TO_FP,
UINT_TO_FP,
- // SIGN_EXTEND_INREG/ZERO_EXTEND_INREG - These operators atomically performs
- // a SHL/(SRA|SHL) pair to (sign|zero) extend a small value in a large
- // integer register (e.g. sign extending the low 8 bits of a 32-bit register
- // to fill the top 24 bits with the 7th bit). The size of the smaller type
- // is indicated by the ExtraValueType in the MVTSDNode for the operator.
+ // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
+ // sign extend a small value in a large integer register (e.g. sign
+ // extending the low 8 bits of a 32-bit register to fill the top 24 bits
+ // with the 7th bit). The size of the smaller type is indicated by the
+ // ExtraValueType in the MVTSDNode for the operator.
SIGN_EXTEND_INREG,
- ZERO_EXTEND_INREG,
// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
// integer.
@@ -809,7 +808,6 @@
static bool classof(const SDNode *N) {
return
N->getOpcode() == ISD::SIGN_EXTEND_INREG ||
- N->getOpcode() == ISD::ZERO_EXTEND_INREG ||
N->getOpcode() == ISD::FP_ROUND_INREG ||
N->getOpcode() == ISD::EXTLOAD ||
N->getOpcode() == ISD::SEXTLOAD ||
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