[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.71 -> 1.72
---
Log message:

Fix sign_extend and zero_extend of promoted value types to expanded value
types.  This occurs when casting short to long on PPC for example.


---
Diffs of the changes:  (+27 -3)

 LegalizeDAG.cpp |   30 +++++++++++++++++++++++++++---
 1 files changed, 27 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.71 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.72
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.71	Fri Apr  1 23:26:37 2005
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Sun Apr  3 18:41:52 2005
@@ -1785,9 +1785,21 @@
     break;
   }
   case ISD::SIGN_EXTEND: {
+    SDOperand In;
+    switch (getTypeAction(Node->getOperand(0).getValueType())) {
+    case Expand: assert(0 && "expand-expand not implemented yet!");
+    case Legal: In = LegalizeOp(Node->getOperand(0)); break;
+    case Promote:
+      In = PromoteOp(Node->getOperand(0));
+      // Emit the appropriate sign_extend_inreg to get the value we want.
+      In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(), In,
+                       Node->getOperand(0).getValueType());
+      break;
+    }
+
     // The low part is just a sign extension of the input (which degenerates to
     // a copy).
-    Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, LegalizeOp(Node->getOperand(0)));
+    Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, In);
     
     // The high part is obtained by SRA'ing all but one of the bits of the lo
     // part.
@@ -1796,7 +1808,19 @@
                                                        TLI.getShiftAmountTy()));
     break;
   }
-  case ISD::ZERO_EXTEND:
+  case ISD::ZERO_EXTEND: {
+    SDOperand In;
+    switch (getTypeAction(Node->getOperand(0).getValueType())) {
+    case Expand: assert(0 && "expand-expand not implemented yet!");
+    case Legal: In = LegalizeOp(Node->getOperand(0)); break;
+    case Promote:
+      In = PromoteOp(Node->getOperand(0));
+      // Emit the appropriate zero_extend_inreg to get the value we want.
+      In = DAG.getNode(ISD::ZERO_EXTEND_INREG, In.getValueType(), In,
+                       Node->getOperand(0).getValueType());
+      break;
+    }
+
     // The low part is just a zero extension of the input (which degenerates to
     // a copy).
     Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, LegalizeOp(Node->getOperand(0)));
@@ -1804,7 +1828,7 @@
     // The high part is just a zero.
     Hi = DAG.getConstant(0, NVT);
     break;
-
+  }
     // These operators cannot be expanded directly, emit them as calls to
     // library functions.
   case ISD::FP_TO_SINT: