[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.98 -> 1.99
---
Log message:

add support for FABS and FNEG


---
Diffs of the changes:  (+10 -4)

 X86ISelPattern.cpp |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.98 llvm/lib/Target/X86/X86ISelPattern.cpp:1.99
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.98	Fri Apr  1 23:03:24 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Fri Apr  1 23:30:17 2005
@@ -64,10 +64,6 @@
       setOperationAction(ISD::SEXTLOAD         , MVT::i1   , Expand);
       setOperationAction(ISD::SREM             , MVT::f64  , Expand);
 
-      // We don't support these yet.
-      setOperationAction(ISD::FNEG             , MVT::f64  , Expand);
-      setOperationAction(ISD::FABS             , MVT::f64  , Expand);
-      
       // These should be promoted to a larger select which is supported.
 /**/  setOperationAction(ISD::SELECT           , MVT::i1   , Promote);
       setOperationAction(ISD::SELECT           , MVT::i8   , Promote);
@@ -1812,6 +1808,16 @@
 
     BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
     return Result;
+
+  case ISD::FABS:
+    Tmp1 = SelectExpr(Node->getOperand(0));
+    BuildMI(BB, X86::FABS, 1, Result).addReg(Tmp1);
+    return Result;
+  case ISD::FNEG:
+    Tmp1 = SelectExpr(Node->getOperand(0));
+    BuildMI(BB, X86::FCHS, 1, Result).addReg(Tmp1);
+    return Result;
+
   case ISD::SUB:
   case ISD::MUL:
   case ISD::AND: