[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
Nate Begeman
natebegeman at mac.com
Fri Apr 1 00:57:55 PST 2005
Changes in directory llvm/lib/Target/PowerPC:
PPC32ISelPattern.cpp updated: 1.30 -> 1.31
---
Log message:
Fix Olden/bh, CR0 was being set in the wrong order
LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.
---
Diffs of the changes: (+3 -5)
PPC32ISelPattern.cpp | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.30 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.31
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.30 Fri Apr 1 01:21:30 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp Fri Apr 1 02:57:43 2005
@@ -731,6 +731,7 @@
unsigned TrueValue = SelectExpr(N.getOperand(1)); //Use if TRUE
unsigned FalseValue = SelectExpr(N.getOperand(2)); //Use if FALSE
+ Opc = SelectSetCR0(N.getOperand(0));
// Create an iterator with which to insert the MBB for copying the false
// value and the MBB to hold the PHI instruction for this SetCC.
@@ -745,11 +746,9 @@
// cmpTY cr0, r1, r2
// bCC copy1MBB
// fallthrough --> copy0MBB
- Tmp1 = SelectExpr(N.getOperand(0)); //Cond
- BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(0);
MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
- BuildMI(BB, PPC::BNE, 2).addReg(PPC::CR0).addMBB(sinkMBB);
+ BuildMI(BB, Opc, 2).addReg(PPC::CR0).addMBB(sinkMBB);
MachineFunction *F = BB->getParent();
F->getBasicBlockList().insert(It, copy0MBB);
F->getBasicBlockList().insert(It, sinkMBB);
@@ -1365,10 +1364,9 @@
return 0;
case ISD::SELECT: {
- Opc = SelectSetCR0(N.getOperand(0));
-
unsigned TrueValue = SelectExpr(N.getOperand(1)); //Use if TRUE
unsigned FalseValue = SelectExpr(N.getOperand(2)); //Use if FALSE
+ Opc = SelectSetCR0(N.getOperand(0));
// Create an iterator with which to insert the MBB for copying the false
// value and the MBB to hold the PHI instruction for this SetCC.
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