[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp

[Nate Begeman]

Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelPattern.cpp updated: 1.24 -> 1.25
---
Log message:

Add support for adding 0.0 and -0.0 to the constant pool, since we lie and
say that we support them, for the purposes of generating fsel instructions.


---
Diffs of the changes:  (+11 -3)

 PPC32ISelPattern.cpp |   14 +++++++++++---
 1 files changed, 11 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.24 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.25
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.24	Thu Mar 31 18:32:34 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp	Thu Mar 31 19:08:07 2005
@@ -760,9 +760,17 @@
     BuildMI(BB, PPC::FMR, 1, Result).addReg(Tmp1);
     return Result;
     
-  case ISD::ConstantFP:
-    assert(0 && "ISD::ConstantFP Unimplemented");
-    abort();
+  case ISD::ConstantFP: {
+    Tmp1 = MakeReg(MVT::i32);
+    ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
+    MachineConstantPool *CP = BB->getParent()->getConstantPool();
+    ConstantFP *CFP = ConstantFP::get(Type::DoubleTy, CN->getValue());
+    unsigned CPI = CP->getConstantPoolIndex(CFP);
+    BuildMI(BB, PPC::LOADHiAddr, 2, Tmp1).addReg(getGlobalBaseReg())
+      .addConstantPoolIndex(CPI);
+    BuildMI(BB, PPC::LFD, 2, Result).addConstantPoolIndex(CPI).addReg(Tmp1);
+    return Result;
+  }
     
   case ISD::MUL:
   case ISD::ADD: