[llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td
Duraid Madina
duraid at octopus.com.au
Wed Mar 30 23:32:43 PST 2005
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.1 -> 1.2
---
Log message:
add what we need to fudge a 'floating point conditional move', this is
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)
---
Diffs of the changes: (+8 -0)
IA64InstrInfo.td | 8 ++++++++
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.1 llvm/lib/Target/IA64/IA64InstrInfo.td:1.2
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.1 Thu Mar 17 12:17:03 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td Thu Mar 31 01:32:32 2005
@@ -59,6 +59,14 @@
"($qp) mov $dst = $src;;">;
}
+def PFMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src, PR:$qp),
+ "($qp) mov $dst = $src;;">;
+
+let isTwoAddress = 1 in {
+ def CFMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src2, FP:$src, PR:$qp),
+ "($qp) mov $dst = $src;;">;
+}
+
let isTwoAddress = 1 in {
def TCMPNE : AForm<0x03, 0x0b,
(ops PR:$dst, PR:$src2, GR:$src3, GR:$src4),
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