[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Mon Feb 28 09:22:31 PST 2005
Changes in directory llvm/lib/Target/Alpha:
AlphaInstrInfo.td updated: 1.26 -> 1.27
---
Log message:
fix integer division and stuff
---
Diffs of the changes: (+5 -5)
AlphaInstrInfo.td | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.26 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.27
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.26 Fri Feb 25 16:55:15 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Mon Feb 28 11:22:18 2005
@@ -79,13 +79,13 @@
def STT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "stt $RA,$DISP">; //store double
}
-let Uses = [R28, R23, R24, R25, R26, R29],
- Defs = [R29] in
+let Uses = [R29],
+ Defs = [R28, R29, R23, R24, R25, R27] in
{
def REMQU : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "remqu $RA,$RB,$RC">; //unsigned remander
- def REMQ : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "remq $RA,$RB,$RC">; //unsigned remander
- def DIVQU : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "divqu $RA,$RB,$RC">; //unsigned remander
- def DIVQ : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "divq $RA,$RB,$RC">; //unsigned remander
+ def REMQ : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "remq $RA,$RB,$RC">; //signed remander
+ def DIVQU : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "divqu $RA,$RB,$RC">; //unsigned division
+ def DIVQ : PseudoInstAlpha<(ops GPRC:$RC, GPRC:$RA, GPRC:$RB), "divq $RA,$RB,$RC">; //signed division
}
//***********************
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