[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Sat Feb 12 13:11:30 PST 2005
Changes in directory llvm/lib/Target/Alpha:
AlphaISelPattern.cpp updated: 1.51 -> 1.52
---
Log message:
try to do better match for i32 adds
---
Diffs of the changes: (+22 -1)
AlphaISelPattern.cpp | 23 ++++++++++++++++++++++-
1 files changed, 22 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.51 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.52
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.51 Sat Feb 12 14:42:09 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp Sat Feb 12 15:11:17 2005
@@ -920,13 +920,34 @@
cast<ConstantSDNode>(N.getOperand(0).getOperand(1))->getValue() <= 255)
{ //Normal imm add/sub
Opc = isAdd ? Alpha::ADDLi : (isMul ? Alpha::MULLi : Alpha::SUBLi);
- Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
+ //if the value was really originally a i32, skip the up conversion
+ if (N.getOperand(0).getOperand(0).getOpcode() == ISD::SIGN_EXTEND_INREG &&
+ dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(0).Val)
+ ->getExtraValueType() == MVT::i32)
+ Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0));
+ else
+ Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
Tmp2 = cast<ConstantSDNode>(N.getOperand(0).getOperand(1))->getValue();
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addImm(Tmp2);
}
else
{ //Normal add/sub
Opc = isAdd ? Alpha::ADDL : (isMul ? Alpha::MULLi : Alpha::SUBL);
+ //if the value was really originally a i32, skip the up conversion
+ if (N.getOperand(0).getOperand(0).getOpcode() == ISD::SIGN_EXTEND_INREG &&
+ dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(0).Val)
+ ->getExtraValueType() == MVT::i32)
+ Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0));
+ else
+ Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
+ //if the value was really originally a i32, skip the up conversion
+ if (N.getOperand(0).getOperand(1).getOpcode() == ISD::SIGN_EXTEND_INREG &&
+ dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(1).Val)
+ ->getExtraValueType() == MVT::i32)
+ Tmp2 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(0));
+ else
+ Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
+
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
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