[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp AlphaRegisterInfo.td

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaISelPattern.cpp updated: 1.28 -> 1.29
AlphaRegisterInfo.td updated: 1.3 -> 1.4
---
Log message:

prevent register allocator from using the stack pointer :)

---
Diffs of the changes:  (+3 -3)

 AlphaISelPattern.cpp |    4 ++--
 AlphaRegisterInfo.td |    2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.28 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.29
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.28	Wed Feb  2 09:05:33 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp	Wed Feb  2 11:00:21 2005
@@ -40,8 +40,8 @@
     AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM) {
       // Set up the TargetLowering object.
       //I am having problems with shr n ubyte 1
-      setShiftAmountType(MVT::i64); //are these needed?
-      setSetCCResultType(MVT::i64); //are these needed?
+      setShiftAmountType(MVT::i64);
+      setSetCCResultType(MVT::i64);
       
       addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass);
       addRegisterClass(MVT::f64, Alpha::FPRCRegisterClass);


Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.td
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.td:1.3 llvm/lib/Target/Alpha/AlphaRegisterInfo.td:1.4
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.td:1.3	Tue Feb  1 14:34:29 2005
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.td	Wed Feb  2 11:00:21 2005
@@ -81,7 +81,7 @@
 //Volitle
      [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R27,
 //Non-Volitile
-     R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, R30 /*, R31*/ ]>;
+     R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, /* R30, R31*/ ]>;
 //R28 is reserved for the assembler
 
 //Don't allocate 15, 29, 30, 31