[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp AlphaInstrInfo.td
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Sun Jan 30 17:44:41 PST 2005
Changes in directory llvm/lib/Target/Alpha:
AlphaISelPattern.cpp updated: 1.20 -> 1.21
AlphaInstrInfo.td updated: 1.10 -> 1.11
---
Log message:
fp to int and back conversion sequences
---
Diffs of the changes: (+34 -14)
AlphaISelPattern.cpp | 46 +++++++++++++++++++++++++++++++++-------------
AlphaInstrInfo.td | 2 +-
2 files changed, 34 insertions(+), 14 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.20 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.21
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.20 Sun Jan 30 14:42:36 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp Sun Jan 30 19:44:26 2005
@@ -412,6 +412,7 @@
{
assert (N.getOperand(0).getValueType() == MVT::i64 && "only quads can be loaded from");
Tmp1 = SelectExpr(N.getOperand(0)); // Get the operand register
+ Tmp2 = MakeReg(MVT::f64);
//The hard way:
// Spill the integer to memory and reload it from there.
@@ -419,12 +420,10 @@
MachineFunction *F = BB->getParent();
int FrameIdx = F->getFrameInfo()->CreateStackObject(Size, Size);
- //STL LDS
- //STQ LDT
- Opc = DestType == MVT::f64 ? Alpha::STQ : Alpha::STL;
- BuildMI(BB, Opc, 2).addReg(Tmp1).addFrameIndex(FrameIdx).addReg(Alpha::F31);
- Opc = DestType == MVT::f64 ? Alpha::LDT : Alpha::LDS;
- BuildMI(BB, Opc, 1, Result).addFrameIndex(FrameIdx).addReg(Alpha::F31);
+ BuildMI(BB, Alpha::STQ, 3).addReg(Tmp1).addFrameIndex(FrameIdx).addReg(Alpha::F31);
+ BuildMI(BB, Alpha::LDT, 2, Tmp2).addFrameIndex(FrameIdx).addReg(Alpha::F31);
+ Opc = DestType == MVT::f64 ? Alpha::CVTQT : Alpha::CVTQS;
+ BuildMI(BB, Opc, 1, Result).addReg(Tmp2);
//The easy way: doesn't work
// //so these instructions are not supported on ev56
@@ -965,13 +964,34 @@
return Result;
// // case ISD::UINT_TO_FP:
-// case ISD::FP_TO_SINT:
-// assert (N.getValueType() == MVT::f64 && "Only can convert for doubles");
-// Tmp1 = SelectExpr(N.getOperand(0)); // Get the operand register
-// Tmp2 = MakeReg(SrcTy);
-// BuildMI(BB, CVTTQ, 1, Tmp2).addReg(Tmp1);
-// BuildMI(BB, FTOIT, 1, Result).addReg(Tmp2);
-// return result;
+
+ case ISD::FP_TO_SINT:
+ {
+ assert (DestType == MVT::i64 && "only quads can be loaded to");
+ MVT::ValueType SrcType = N.getOperand(0).getValueType();
+ Tmp1 = SelectExpr(N.getOperand(0)); // Get the operand register
+
+ //The hard way:
+ // Spill the integer to memory and reload it from there.
+ unsigned Size = MVT::getSizeInBits(MVT::f64)/8;
+ MachineFunction *F = BB->getParent();
+ int FrameIdx = F->getFrameInfo()->CreateStackObject(Size, 8);
+
+ //CVTTQ STT LDQ
+ //CVTST CVTTQ STT LDQ
+ if (SrcType == MVT::f32)
+ {
+ Tmp2 = MakeReg(MVT::f64);
+ BuildMI(BB, Alpha::CVTST, 1, Tmp2).addReg(Tmp1);
+ Tmp1 = Tmp2;
+ }
+ Tmp2 = MakeReg(MVT::f64);
+ BuildMI(BB, Alpha::CVTTQ, 1, Tmp2).addReg(Tmp1);
+ BuildMI(BB, Alpha::STT, 3).addReg(Tmp2).addFrameIndex(FrameIdx).addReg(Alpha::F31);
+ BuildMI(BB, Alpha::LDQ, 2, Result).addFrameIndex(FrameIdx).addReg(Alpha::F31);
+
+ return Result;
+ }
// // case ISD::FP_TO_UINT:
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.10 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.11
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.10 Sun Jan 30 14:42:36 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Sun Jan 30 19:44:26 2005
@@ -331,7 +331,7 @@
def CVTQS : FPForm<0x16, 0x0BC, (ops FPRC:$RC, FPRC:$RA), "cvtqs $RA,$RC">; //Convert quadword to S_floating
def CVTQT : FPForm<0x16, 0x0BE, (ops FPRC:$RC, FPRC:$RA), "cvtqt $RA,$RC">; //Convert quadword to T_floating
def CVTST : FPForm<0x16, 0x2AC, (ops FPRC:$RC, FPRC:$RA), "cvtst $RA,$RC">; //Convert S_floating to T_floating
-//CVTTQ F-P 16.0AF Convert T_floating to quadword
+def CVTTQ : FPForm<0x16, 0x0AF, (ops FPRC:$RC, FPRC:$RA), "cvttq $RA,$RC">; //Convert T_floating to quadword
def CVTTS : FPForm<0x16, 0x2AC, (ops FPRC:$RC, FPRC:$RA), "cvtts $RA,$RC">; //Convert T_floating to S_floating
//S_floating : IEEE Single
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