[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Tue Jan 25 18:54:11 PST 2005
Changes in directory llvm/lib/Target/Alpha:
AlphaISelPattern.cpp updated: 1.5 -> 1.6
---
Log message:
hum, writing on one machine, testing on another...
---
Diffs of the changes: (+5 -4)
AlphaISelPattern.cpp | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.5 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.6
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.5 Tue Jan 25 19:24:38 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp Tue Jan 25 20:53:56 2005
@@ -665,10 +665,11 @@
// the ops are expanded into special library calls with
// special calling conventions
switch(N.getOpcode()) {
- case UREM: Opc = Alpha::REMQU; break;
- case SREM: Opc = Alpha::REMQ; break;
- case UDIV: Opc = Alpha::DIVQU; break;
- case SDIV: Opc = Alpha::DIVQ; break;
+ case ISD::UREM: Opc = Alpha::REMQU; break;
+ case ISD::SREM: Opc = Alpha::REMQ; break;
+ case ISD::UDIV: Opc = Alpha::DIVQU; break;
+ case ISD::SDIV: Opc = Alpha::DIVQ; break;
+ };
Tmp1 = SelectExpr(N.getOperand(0));
Tmp2 = SelectExpr(N.getOperand(1));
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
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