[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp SelectionDAGISel.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAG.cpp updated: 1.37 -> 1.38
SelectionDAGISel.cpp updated: 1.21 -> 1.22
---
Log message:

Refactor code into a new method.


---
Diffs of the changes:  (+23 -13)

Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.37 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.38
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.37	Sat Jan 15 20:23:22 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Mon Jan 17 11:15:02 2005
@@ -567,8 +567,7 @@
     assert(VT == N1.getValueType() &&
            "Shift operators return type must be the same as their first arg");
     assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
-           "Shifts only work on integers");
-    assert(VT >= MVT::i8 && "Shift amount cannot be a MVT::i1");
+           VT != MVT::i1 && "Shifts only work on integers");
     break;
   default: break;
   }


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.21 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.22
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.21	Sun Jan 16 01:28:41 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Mon Jan 17 11:15:02 2005
@@ -806,30 +806,41 @@
   return DAG.getCopyToReg(DAG.getRoot(), Op, Reg);
 }
 
-void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
-       std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
-                                    FunctionLoweringInfo &FuncInfo) {
-  SelectionDAGLowering SDL(DAG, TLI, FuncInfo);
-
-  std::vector<SDOperand> UnorderedChains;
-  
+void SelectionDAGISel::
+LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
+               std::vector<SDOperand> &UnorderedChains) {
   // If this is the entry block, emit arguments.
-  Function *F = LLVMBB->getParent();
-  if (LLVMBB == &F->front()) {
+  Function &F = *BB->getParent();
+
+  if (BB == &F.front()) {
     // FIXME: If an argument is only used in one basic block, we could directly
     // emit it (ONLY) into that block, not emitting the COPY_TO_VREG node.  This
     // would improve codegen in several cases on X86 by allowing the loads to be
     // folded into the user operation.
-    std::vector<SDOperand> Args = TLI.LowerArguments(*LLVMBB->getParent(), DAG);
+    std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
+
+    FunctionLoweringInfo &FuncInfo = SDL.FuncInfo;
 
     unsigned a = 0;
-    for (Function::aiterator AI = F->abegin(), E = F->aend(); AI != E; ++AI,++a)
+    for (Function::aiterator AI = F.abegin(), E = F.aend(); AI != E; ++AI,++a)
       if (!AI->use_empty()) {
         SDL.setValue(AI, Args[a]);
         UnorderedChains.push_back(
                  CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]));
       }
   }
+}
+
+
+void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
+       std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
+                                    FunctionLoweringInfo &FuncInfo) {
+  SelectionDAGLowering SDL(DAG, TLI, FuncInfo);
+
+  std::vector<SDOperand> UnorderedChains;
+  
+  // Lower any arguments needed in this block.
+  LowerArguments(LLVMBB, SDL, UnorderedChains);
 
   BB = FuncInfo.MBBMap[LLVMBB];
   SDL.setCurrentBasicBlock(BB);