[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.32 -> 1.33
---
Log message:

Fold multiplies by 3,5,9 into addressing modes when possible.


---
Diffs of the changes:  (+28 -0)

Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.32 llvm/lib/Target/X86/X86ISelPattern.cpp:1.33
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.32	Tue Jan 11 00:36:20 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Tue Jan 11 13:37:02 2005
@@ -447,6 +447,34 @@
         }
       }
     break;
+  case ISD::MUL:
+    // X*[3,5,9] -> X+X*[2,4,8]
+    if (AM.IndexReg == 0 && AM.BaseType == X86AddressMode::RegBase &&
+        AM.Base.Reg == 0)
+      if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.Val->getOperand(1)))
+        if (CN->getValue() == 3 || CN->getValue() == 5 || CN->getValue() == 9) {
+          AM.Scale = unsigned(CN->getValue())-1;
+
+          SDOperand MulVal = N.Val->getOperand(0);
+          unsigned Reg;
+
+          // Okay, we know that we have a scale by now.  However, if the scaled
+          // value is an add of something and a constant, we can fold the
+          // constant into the disp field here.
+          if (MulVal.Val->getOpcode() == ISD::ADD &&
+              isa<ConstantSDNode>(MulVal.Val->getOperand(1))) {
+            Reg = SelectExpr(MulVal.Val->getOperand(0));
+            ConstantSDNode *AddVal =
+              cast<ConstantSDNode>(MulVal.Val->getOperand(1));
+            AM.Disp += AddVal->getValue() * CN->getValue();
+          } else {          
+            Reg = SelectExpr(N.Val->getOperand(0));
+          }
+
+          AM.IndexReg = AM.Base.Reg = Reg;
+          return false;
+        }
+    break;
 
   case ISD::ADD: {
     X86AddressMode Backup = AM;