[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.19 -> 1.20
---
Log message:

Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field
of an ADDri (due to current restrictions on MachineOperand :( ).  This allows
us to generate:

        leal Data+16000, %edx

instead of:

        movl $Data, %edx
        addl $16000, %edx



---
Diffs of the changes:  (+2 -2)

Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.19 llvm/lib/Target/X86/X86ISelPattern.cpp:1.20
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.19	Sun Jan  9 13:49:59 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Sun Jan  9 14:20:29 2005
@@ -1027,11 +1027,11 @@
       if (!SelectAddress(N.getOperand(0), AM) &&
           !SelectAddress(N.getOperand(1), AM)) {
 	// If this is not just an add, emit the LEA.  For a simple add (like
-	// reg+reg or reg+imm), we just emit an add.  If might be a good idea to
+	// reg+reg or reg+imm), we just emit an add.  It might be a good idea to
 	// leave this as LEA, then peephole it to 'ADD' after two address elim
 	// happens.
         if (AM.Scale != 1 || AM.BaseType == X86AddressMode::FrameIndexBase ||
-            AM.Base.Reg && AM.IndexReg && (AM.Disp || AM.GV)) {
+            AM.GV || (AM.Base.Reg && AM.IndexReg && AM.Disp)) {
           addFullAddress(BuildMI(BB, X86::LEA32r, 4, Result), AM);
           return Result;
         }