[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Chris Lattner
lattner at cs.uiuc.edu
Sun Jan 9 12:10:11 PST 2005
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.15 -> 1.16
---
Log message:
Add a simple transformation. This allows us to compile one of the inner
loops in stepanov to this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
instead of this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $data, %ecx
movl %ecx, %edx
addl $16000, %edx
subl %ecx, %edx
movl %edx, %ecx
sarl $2, %ecx
shrl $29, %ecx
addl %ecx, %edx
sarl $3, %edx
cmpl %edx, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
The old instruction selector produced:
.LBB_Z5test0PdS__2: # no_exit.1
fldl 24(%esp)
faddl data(,%eax,8)
fstl 24(%esp)
movl %eax, %ecx
incl %ecx
incl %eax
leal data+16000, %edx
movl $data, %edi
subl %edi, %edx
movl %edx, %edi
sarl $2, %edi
shrl $29, %edi
addl %edi, %edx
sarl $3, %edx
cmpl %edx, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2 # no_exit.1
Which is even worse!
---
Diffs of the changes: (+8 -0)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.15 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.16
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.15 Sat Jan 8 02:08:56 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Jan 9 14:09:57 2005
@@ -662,6 +662,14 @@
case ISD::XOR:
if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0
break;
+ case ISD::SUB:
+ if (N1.getOpcode() == ISD::ADD) {
+ if (N1.Val->getOperand(0) == N2)
+ return N1.Val->getOperand(1); // (A+B)-A == B
+ if (N1.Val->getOperand(1) == N2)
+ return N1.Val->getOperand(0); // (A+B)-B == A
+ }
+ break;
}
SDNode *&N = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
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