[llvm-commits] CVS: llvm/lib/Target/Target.td

[Chris Lattner]

Changes in directory llvm/lib/Target:

Target.td updated: 1.42 -> 1.43
---
Log message:

Add some bits that can be set for instructions.


---
Diffs of the changes:  (+2 -0)

Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.42 llvm/lib/Target/Target.td:1.43
--- llvm/lib/Target/Target.td:1.42	Thu Oct 14 00:53:40 2004
+++ llvm/lib/Target/Target.td	Sat Jan  1 20:27:48 2005
@@ -133,6 +133,8 @@
   bit isLoad       = 0;     // Is this instruction a load instruction?
   bit isStore      = 0;     // Is this instruction a store instruction?
   bit isTwoAddress = 0;     // Is this a two address instruction?
+  bit isConvertibleToThreeAddress = 0;  // Can this 2-addr instruction promote?
+  bit isCommutable = 0;     // Is this 3 operand instruction commutable?
   bit isTerminator = 0;     // Is this part of the terminator for a basic block?
   bit hasDelaySlot = 0;     // Does this instruction have an delay slot?
 }