[llvm-commits] CVS: llvm/Makefile.rules

Chris Lattner lattner at cs.uiuc.edu
Thu Dec 16 09:34:16 PST 2004



Changes in directory llvm:

Makefile.rules updated: 1.271 -> 1.272
---
Log message:

Add spaces between rule groups to make it more obvious which ones pair

Remove instrselector generation, remove Intel/ATT specifics from Makefile.rules.


---
Diffs of the changes:  (+10 -22)

Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.271 llvm/Makefile.rules:1.272
--- llvm/Makefile.rules:1.271	Thu Dec 16 11:28:50 2004
+++ llvm/Makefile.rules	Thu Dec 16 11:34:04 2004
@@ -966,6 +966,7 @@
 %GenRegisterNames.inc : $(ObjDir)/%GenRegisterNames.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
+
 $(TARGET:%=$(ObjDir)/%GenRegisterInfo.h.inc.tmp): \
 $(ObjDir)/%GenRegisterInfo.h.inc.tmp : %.td $(ObjDir)/.dir
 	$(Echo) "Building $(<F) register information header with tblgen"
@@ -975,6 +976,7 @@
 %GenRegisterInfo.h.inc : $(ObjDir)/%GenRegisterInfo.h.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
+
 $(TARGET:%=$(ObjDir)/%GenRegisterInfo.inc.tmp): \
 $(ObjDir)/%GenRegisterInfo.inc.tmp : %.td $(ObjDir)/.dir
 	$(Echo) "Building $(<F) register info implementation with tblgen"
@@ -984,6 +986,7 @@
 %GenRegisterInfo.inc : $(ObjDir)/%GenRegisterInfo.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
+
 $(TARGET:%=$(ObjDir)/%GenInstrNames.inc.tmp): \
 $(ObjDir)/%GenInstrNames.inc.tmp : %.td $(ObjDir)/.dir
 	$(Echo) "Building $(<F) instruction names with tblgen"
@@ -993,6 +996,7 @@
 %GenInstrNames.inc : $(ObjDir)/%GenInstrNames.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
+
 $(TARGET:%=$(ObjDir)/%GenInstrInfo.inc.tmp): \
 $(ObjDir)/%GenInstrInfo.inc.tmp : %.td $(ObjDir)/.dir
 	$(Echo) "Building $(<F) instruction information with tblgen"
@@ -1002,6 +1006,7 @@
 %GenInstrInfo.inc : $(ObjDir)/%GenInstrInfo.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
+
 $(TARGET:%=$(ObjDir)/%GenAsmWriter.inc.tmp): \
 $(ObjDir)/%GenAsmWriter.inc.tmp : %.td $(ObjDir)/.dir
 	$(Echo) "Building $(<F) assembly writer with tblgen"
@@ -1011,32 +1016,15 @@
 %GenAsmWriter.inc : $(ObjDir)/%GenAsmWriter.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
-$(TARGET:%=$(ObjDir)/%GenATTAsmWriter.inc.tmp): \
-$(ObjDir)/%GenATTAsmWriter.inc.tmp : %.td $(ObjDir)/.dir
-	$(Echo) "Building $(<F) AT&T assembly writer with tblgen"
-	$(Verb) $(TableGen) -gen-asm-writer -o $@ $< 
-
-$(TARGET:%=%GenATTAsmWriter.inc): \
-%GenATTAsmWriter.inc : $(ObjDir)/%GenATTAsmWriter.inc.tmp
-	$(Verb) cmp -s $@ $< || cp $< $@
-
-$(TARGET:%=$(ObjDir)/%GenIntelAsmWriter.inc.tmp): \
-$(ObjDir)/%GenIntelAsmWriter.inc.tmp : %.td $(ObjDir)/.dir
-	$(Echo) "Building $(<F) Intel assembly writer with tblgen"
+$(TARGET:%=$(ObjDir)/%GenAsmWriter1.inc.tmp): \
+$(ObjDir)/%GenAsmWriter1.inc.tmp : %.td $(ObjDir)/.dir
+	$(Echo) "Building $(<F) assembly writer #1 with tblgen"
 	$(Verb) $(TableGen) -gen-asm-writer -asmwriternum=1 -o $@ $< 
 
-$(TARGET:%=%GenIntelAsmWriter.inc): \
-%GenIntelAsmWriter.inc : $(ObjDir)/%GenIntelAsmWriter.inc.tmp
+$(TARGET:%=%GenAsmWriter1.inc): \
+%GenAsmWriter1.inc : $(ObjDir)/%GenAsmWriter1.inc.tmp
 	$(Verb) cmp -s $@ $< || cp $< $@
 
-$(TARGET:%=$(ObjDir)/%GenInstrSelector.inc.tmp): \
-$(ObjDir)/%GenInstrSelector.inc.tmp: %.td $(ObjDir)/.dir
-	$(Echo) "Building $(<F) instruction selector with tblgen"
-	$(Verb) $(TableGen) -gen-instr-selector -o $@ $< 
-
-$(TARGET:%=%GenInstrSelector.inc): \
-%GenInstrSelector.inc : $(ObjDir)/%GenInstrSelector.inc.tmp
-	$(Verb) cmp -s $@ $< || cp $< $@
 
 $(TARGET:%=$(ObjDir)/%GenCodeEmitter.inc.tmp): \
 $(ObjDir)/%GenCodeEmitter.inc.tmp: %.td $(ObjDir)/.dir






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