[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
Chris Lattner
lattner at cs.uiuc.edu
Tue Nov 23 19:52:17 PST 2004
Changes in directory llvm/lib/Target/PowerPC:
PowerPCInstrFormats.td updated: 1.27 -> 1.28
---
Log message:
Fix a few more tests by encoding the extsb and other XForm11 instructions
correctly.
---
Diffs of the changes: (+19 -12)
Index: llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PowerPCInstrFormats.td:1.27 llvm/lib/Target/PowerPC/PowerPCInstrFormats.td:1.28
--- llvm/lib/Target/PowerPC/PowerPCInstrFormats.td:1.27 Tue Nov 23 20:15:41 2004
+++ llvm/lib/Target/PowerPC/PowerPCInstrFormats.td Tue Nov 23 21:52:02 2004
@@ -214,6 +214,23 @@
let Inst{31} = rc;
}
+// This is the same as XForm_base_r3xo, but the first two operands are swapped
+// when code is emitted.
+class XForm_base_r3xo_swapped
+ <bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
+ dag OL, string asmstr>
+ : I<opcode, ppc64, vmx, OL, asmstr> {
+ bits<5> A;
+ bits<5> RST;
+ bits<5> B;
+
+ let Inst{6-10} = RST;
+ let Inst{11-15} = A;
+ let Inst{16-20} = B;
+ let Inst{21-30} = xo;
+ let Inst{31} = rc;
+}
+
class XForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
dag OL, string asmstr>
@@ -228,17 +245,7 @@
class XForm_6<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr>
- : I<opcode, ppc64, vmx, OL, asmstr> {
- bits<5> A;
- bits<5> RST;
- bits<5> B;
-
- let Inst{6-10} = RST;
- let Inst{11-15} = A;
- let Inst{16-20} = B;
- let Inst{21-30} = xo;
- let Inst{31} = rc;
-}
+ : XForm_base_r3xo_swapped<opcode, xo, rc, ppc64, vmx, OL, asmstr>;
class XForm_8<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
dag OL, string asmstr>
@@ -251,7 +258,7 @@
class XForm_11<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr>
- : XForm_base_r3xo<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
+ : XForm_base_r3xo_swapped<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
let B = 0;
}
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