[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPC.td PPC32.td PPC64.td PowerPCInstrInfo.h
Chris Lattner
lattner at cs.uiuc.edu
Tue Nov 23 12:37:55 PST 2004
Changes in directory llvm/lib/Target/PowerPC:
PowerPC.td updated: 1.10 -> 1.11
PPC32.td updated: 1.2 -> 1.3
PPC64.td updated: 1.3 -> 1.4
PowerPCInstrInfo.h updated: 1.7 -> 1.8
---
Log message:
Get rid of flags that are dead
---
Diffs of the changes: (+38 -52)
Index: llvm/lib/Target/PowerPC/PowerPC.td
diff -u llvm/lib/Target/PowerPC/PowerPC.td:1.10 llvm/lib/Target/PowerPC/PowerPC.td:1.11
--- llvm/lib/Target/PowerPC/PowerPC.td:1.10 Thu Oct 14 00:54:38 2004
+++ llvm/lib/Target/PowerPC/PowerPC.td Tue Nov 23 14:37:41 2004
@@ -24,9 +24,8 @@
def PowerPCInstrInfo : InstrInfo {
let PHIInst = PHI;
- let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
- "Arg3Type", "Arg4Type", "VMX", "PPC64"];
- let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+ let TSFlagsFields = [ "VMX", "PPC64" ];
+ let TSFlagsShifts = [ 0, 1 ];
let isLittleEndianEncoding = 1;
}
Index: llvm/lib/Target/PowerPC/PPC32.td
diff -u llvm/lib/Target/PowerPC/PPC32.td:1.2 llvm/lib/Target/PowerPC/PPC32.td:1.3
--- llvm/lib/Target/PowerPC/PPC32.td:1.2 Thu Oct 14 00:54:38 2004
+++ llvm/lib/Target/PowerPC/PPC32.td Tue Nov 23 14:37:41 2004
@@ -24,9 +24,8 @@
def PowerPCInstrInfo : InstrInfo {
let PHIInst = PHI;
- let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
- "Arg3Type", "Arg4Type", "VMX", "PPC64"];
- let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+ let TSFlagsFields = [ "VMX", "PPC64" ];
+ let TSFlagsShifts = [ 0, 1 ];
let isLittleEndianEncoding = 1;
}
Index: llvm/lib/Target/PowerPC/PPC64.td
diff -u llvm/lib/Target/PowerPC/PPC64.td:1.3 llvm/lib/Target/PowerPC/PPC64.td:1.4
--- llvm/lib/Target/PowerPC/PPC64.td:1.3 Thu Oct 14 00:54:38 2004
+++ llvm/lib/Target/PowerPC/PPC64.td Tue Nov 23 14:37:41 2004
@@ -24,9 +24,8 @@
def PowerPCInstrInfo : InstrInfo {
let PHIInst = PHI;
- let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
- "Arg3Type", "Arg4Type", "VMX", "PPC64"];
- let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+ let TSFlagsFields = [ "VMX", "PPC64" ];
+ let TSFlagsShifts = [ 0, 1 ];
let isLittleEndianEncoding = 1;
}
Index: llvm/lib/Target/PowerPC/PowerPCInstrInfo.h
diff -u llvm/lib/Target/PowerPC/PowerPCInstrInfo.h:1.7 llvm/lib/Target/PowerPC/PowerPCInstrInfo.h:1.8
--- llvm/lib/Target/PowerPC/PowerPCInstrInfo.h:1.7 Tue Aug 17 00:00:46 2004
+++ llvm/lib/Target/PowerPC/PowerPCInstrInfo.h Tue Nov 23 14:37:41 2004
@@ -18,49 +18,38 @@
#include "llvm/Target/TargetInstrInfo.h"
namespace llvm {
-
-namespace PPCII {
- enum {
- ArgCountShift = 0,
- ArgCountMask = 7,
-
- Arg0TypeShift = 3,
- Arg1TypeShift = 8,
- Arg2TypeShift = 13,
- Arg3TypeShift = 18,
- Arg4TypeShift = 23,
- VMX = 1<<28,
- PPC64 = 1<<29,
- ArgTypeMask = 31
- };
-
- enum {
- None = 0,
- Gpr = 1,
- Gpr0 = 2,
- Simm16 = 3,
- Zimm16 = 4,
- PCRelimm24 = 5,
- Imm24 = 6,
- Imm5 = 7,
- PCRelimm14 = 8,
- Imm14 = 9,
- Imm2 = 10,
- Crf = 11,
- Imm3 = 12,
- Imm1 = 13,
- Fpr = 14,
- Imm4 = 15,
- Imm8 = 16,
- Disimm16 = 17,
- Disimm14 = 18,
- Spr = 19,
- Sgr = 20,
- Imm15 = 21,
- Vpr = 22
- };
-}
-
+ namespace PPCII {
+ enum {
+ VMX = 1 << 0,
+ PPC64 = 1 << 1,
+ };
+
+ enum {
+ None = 0,
+ Gpr = 1,
+ Gpr0 = 2,
+ Simm16 = 3,
+ Zimm16 = 4,
+ PCRelimm24 = 5,
+ Imm24 = 6,
+ Imm5 = 7,
+ PCRelimm14 = 8,
+ Imm14 = 9,
+ Imm2 = 10,
+ Crf = 11,
+ Imm3 = 12,
+ Imm1 = 13,
+ Fpr = 14,
+ Imm4 = 15,
+ Imm8 = 16,
+ Disimm16 = 17,
+ Disimm14 = 18,
+ Spr = 19,
+ Sgr = 20,
+ Imm15 = 21,
+ Vpr = 22
+ };
+ }
}
#endif
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