[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp

Nate Begeman natebegeman at mac.com
Sun Nov 7 12:23:52 PST 2004



Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelSimple.cpp updated: 1.100 -> 1.101
---
Log message:

Disable bogus cast elimination when the cast is used by a setcc instruction.


---
Diffs of the changes:  (+4 -4)

Index: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.100 llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.101
--- llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.100	Thu Nov  4 13:43:18 2004
+++ llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp	Sun Nov  7 14:23:42 2004
@@ -3163,15 +3163,15 @@
   // emit them, as the store instruction will implicitly not store the zero or
   // sign extended bytes.
   if (SrcClass <= cInt && SrcClass >= DestClass) {
-    bool AllUsesAreStoresOrSetCC = true;
+    bool AllUsesAreStores = true;
     for (Value::use_iterator I = CI.use_begin(), E = CI.use_end(); I != E; ++I)
-      if (!isa<StoreInst>(*I) && !isa<SetCondInst>(*I)) {
-        AllUsesAreStoresOrSetCC = false;
+      if (!isa<StoreInst>(*I)) {
+        AllUsesAreStores = false;
         break;
       }        
     // Turn this cast directly into a move instruction, which the register
     // allocator will deal with.
-    if (AllUsesAreStoresOrSetCC) { 
+    if (AllUsesAreStores) { 
       unsigned SrcReg = getReg(Op, BB, MI);
       BuildMI(*BB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
       return; 






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