[llvm-commits] CVS: llvm/lib/Target/X86/Makefile
Reid Spencer
reid at x10sys.com
Fri Oct 22 14:02:21 PDT 2004
Changes in directory llvm/lib/Target/X86:
Makefile updated: 1.20 -> 1.21
---
Log message:
Adjust to changes in Makefile.rules
---
Diffs of the changes: (+5 -43)
Index: llvm/lib/Target/X86/Makefile
diff -u llvm/lib/Target/X86/Makefile:1.20 llvm/lib/Target/X86/Makefile:1.21
--- llvm/lib/Target/X86/Makefile:1.20 Sun Oct 3 15:36:57 2004
+++ llvm/lib/Target/X86/Makefile Fri Oct 22 16:02:08 2004
@@ -8,50 +8,12 @@
##===----------------------------------------------------------------------===##
LEVEL = ../../..
LIBRARYNAME = x86
-include $(LEVEL)/Makefile.common
-
TARGET = X86
-
# Make sure that tblgen is run, first thing.
-$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
- X86GenRegisterInfo.inc X86GenInstrNames.inc \
- X86GenInstrInfo.inc X86GenATTAsmWriter.inc \
- X86GenIntelAsmWriter.inc
-
-TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
- $(SourceDir)/../Target.td
-
-$(TARGET)GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
-
-$(TARGET)GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register information header with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+BUILT_SOURCES = X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
+ X86GenRegisterInfo.inc X86GenInstrNames.inc \
+ X86GenInstrInfo.inc X86GenATTAsmWriter.inc \
+ X86GenIntelAsmWriter.inc
-$(TARGET)GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register info implementation with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
-
-$(TARGET)GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
-
-$(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction information with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
-
-$(TARGET)GenATTAsmWriter.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td AT&T assembly writer with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -o $@
-
-$(TARGET)GenIntelAsmWriter.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td Intel assembly writer with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -asmwriternum=1 -o $@
-
-#$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
-# @echo "Building $(TARGET).td instruction selector with tblgen"
-# $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+include $(LEVEL)/Makefile.common
-clean::
- $(VERB) rm -f *.inc
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