[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
Misha Brukman
brukman at cs.uiuc.edu
Wed Oct 13 22:55:48 PDT 2004
Changes in directory llvm/lib/Target/PowerPC:
PowerPCInstrFormats.td updated: 1.20 -> 1.21
---
Log message:
There is only one field in an instruction, and that is `Inst', the final view of
the instruction binary format, all others are simply operands and should not
have the `field' label
---
Diffs of the changes: (+51 -51)
Index: llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PowerPCInstrFormats.td:1.20 llvm/lib/Target/PowerPC/PowerPCInstrFormats.td:1.21
--- llvm/lib/Target/PowerPC/PowerPCInstrFormats.td:1.20 Sat Sep 4 00:00:00 2004
+++ llvm/lib/Target/PowerPC/PowerPCInstrFormats.td Thu Oct 14 00:55:37 2004
@@ -11,7 +11,7 @@
//===----------------------------------------------------------------------===//
class Format<bits<5> val> {
- bits<5> Value = val;
+ bits<5> Value = val;
}
def Pseudo: Format<0>;
@@ -65,7 +65,7 @@
// 1.7.1 I-Form
class IForm<bits<6> opcode, bit aa, bit lk, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<24> LI;
+ bits<24> LI;
let ArgCount = 1;
let Arg0Type = Imm24.Value;
@@ -82,9 +82,9 @@
// 1.7.2 B-Form
class BForm<bits<6> opcode, bit aa, bit lk, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> BO;
- field bits<5> BI;
- field bits<14> BD;
+ bits<5> BO;
+ bits<5> BI;
+ bits<14> BD;
let ArgCount = 3;
let Arg0Type = Imm5.Value;
@@ -114,9 +114,9 @@
// 1.7.4 D-Form
class DForm_base<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
: I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> A;
- field bits<5> B;
- field bits<16> C;
+ bits<5> A;
+ bits<5> B;
+ bits<16> C;
let ArgCount = 3;
let Arg0Type = Gpr.Value;
@@ -141,8 +141,8 @@
class DForm_2_r0<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
: I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> A;
- field bits<16> B;
+ bits<5> A;
+ bits<16> B;
let ArgCount = 2;
let Arg0Type = Gpr.Value;
@@ -176,10 +176,10 @@
class DForm_5<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
: I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<3> BF;
- field bits<1> L;
- field bits<5> RA;
- field bits<16> I;
+ bits<3> BF;
+ bits<1> L;
+ bits<5> RA;
+ bits<16> I;
let ArgCount = 4;
let Arg0Type = Imm3.Value;
@@ -231,9 +231,9 @@
// 1.7.5 DS-Form
class DSForm_1<bits<6> opcode, bits<2> xo, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> RST;
- field bits<14> DS;
- field bits<5> RA;
+ bits<5> RST;
+ bits<14> DS;
+ bits<5> RA;
let ArgCount = 3;
let Arg0Type = Gpr.Value;
@@ -256,9 +256,9 @@
class XForm_base_r3xo<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr>
: I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> RST;
- field bits<5> A;
- field bits<5> B;
+ bits<5> RST;
+ bits<5> A;
+ bits<5> B;
let ArgCount = 3;
let Arg0Type = Gpr.Value;
@@ -313,10 +313,10 @@
class XForm_16<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<3> BF;
- field bits<1> L;
- field bits<5> RA;
- field bits<5> RB;
+ bits<3> BF;
+ bits<1> L;
+ bits<5> RA;
+ bits<5> RB;
let ArgCount = 4;
let Arg0Type = Imm3.Value;
@@ -346,9 +346,9 @@
class XForm_17<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<3> BF;
- field bits<5> FRA;
- field bits<5> FRB;
+ bits<3> BF;
+ bits<5> FRA;
+ bits<5> FRB;
let ArgCount = 3;
let Arg0Type = Imm3.Value;
@@ -400,9 +400,9 @@
class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> BO;
- field bits<5> BI;
- field bits<2> BH;
+ bits<5> BO;
+ bits<5> BI;
+ bits<2> BH;
let ArgCount = 3;
let Arg0Type = Imm5.Value;
@@ -435,8 +435,8 @@
// 1.7.8 XFX-Form
class XFXForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> ST;
- field bits<10> SPR;
+ bits<5> ST;
+ bits<10> SPR;
let ArgCount = 2;
let Arg0Type = Imm5.Value;
@@ -476,9 +476,9 @@
// 1.7.10 XS-Form
class XSForm_1<bits<6> opcode, bits<9> xo, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> RS;
- field bits<5> A;
- field bits<6> SH;
+ bits<5> RS;
+ bits<5> A;
+ bits<6> SH;
let ArgCount = 3;
let Arg0Type = Gpr.Value;
@@ -498,9 +498,9 @@
// 1.7.11 XO-Form
class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
- field bits<5> RT;
- field bits<5> RA;
- field bits<5> RB;
+ bits<5> RT;
+ bits<5> RA;
+ bits<5> RB;
let ArgCount = 3;
let Arg0Type = Gpr.Value;
@@ -535,10 +535,10 @@
class AForm_1<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
let ArgCount = 4;
- field bits<5> FRT;
- field bits<5> FRA;
- field bits<5> FRB;
- field bits<5> FRC;
+ bits<5> FRT;
+ bits<5> FRA;
+ bits<5> FRB;
+ bits<5> FRC;
let Arg0Type = Fpr.Value;
let Arg1Type = Fpr.Value;
@@ -574,11 +574,11 @@
class MForm_1<bits<6> opcode, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
let ArgCount = 5;
- field bits<5> RS;
- field bits<5> RA;
- field bits<5> RB;
- field bits<5> MB;
- field bits<5> ME;
+ bits<5> RS;
+ bits<5> RA;
+ bits<5> RB;
+ bits<5> MB;
+ bits<5> ME;
let Arg0Type = Gpr.Value;
let Arg1Type = Gpr.Value;
@@ -604,10 +604,10 @@
class MDForm_1<bits<6> opcode, bits<3> xo, bit rc, bit ppc64, bit vmx,
dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
let ArgCount = 4;
- field bits<5> RS;
- field bits<5> RA;
- field bits<6> SH;
- field bits<6> MBE;
+ bits<5> RS;
+ bits<5> RA;
+ bits<6> SH;
+ bits<6> MBE;
let Arg0Type = Gpr.Value;
let Arg1Type = Gpr.Value;
More information about the llvm-commits
mailing list