[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp
Nate Begeman
natebegeman at mac.com
Tue Sep 28 20:45:43 PDT 2004
Changes in directory llvm/lib/Target/PowerPC:
PPC32ISelSimple.cpp updated: 1.83 -> 1.84
---
Log message:
improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends
---
Diffs of the changes: (+8 -1)
Index: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.83 llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.84
--- llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.83 Tue Sep 28 21:35:05 2004
+++ llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp Tue Sep 28 22:45:33 2004
@@ -993,6 +993,11 @@
unsigned Reg = getReg(Op0, MBB, IP);
unsigned Class = getClassB(CompTy);
+ // Since we know that boolean values will be either zero or one, we don't
+ // have to extend or clear them.
+ if (CompTy == Type::BoolTy)
+ return Reg;
+
// Before we do a comparison or SetCC, we have to make sure that we truncate
// the source registers appropriately.
if (Class == cByte) {
@@ -1374,7 +1379,9 @@
switch (getClassB(Ty)) {
case cByte:
// Extend value into target register (8->32)
- if (isUnsigned)
+ if (Ty == Type::BoolTy)
+ BuildMI(BB, PPC::OR, 2, targetReg).addReg(Reg).addReg(Reg);
+ else if (isUnsigned)
BuildMI(BB, PPC::RLWINM, 4, targetReg).addReg(Reg).addZImm(0)
.addZImm(24).addZImm(31);
else
More information about the llvm-commits
mailing list