[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp PPC32RegisterInfo.cpp

[Nate Begeman]

Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelSimple.cpp updated: 1.81 -> 1.82
PPC32RegisterInfo.cpp updated: 1.5 -> 1.6
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Log message:

Correct some BuildMI arguments for the upcoming simple scheduler

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Diffs of the changes:  (+2 -2)

Index: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.81 llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.82
--- llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.81	Thu Sep 23 00:31:33 2004
+++ llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp	Mon Sep 27 00:07:25 2004
@@ -557,7 +557,7 @@
     MachineBasicBlock::iterator MBBI = FirstMBB.begin();
     GlobalBaseReg = makeAnotherReg(Type::IntTy);
     BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR);
-    BuildMI(FirstMBB, MBBI, PPC::MFLR, 0, GlobalBaseReg).addReg(PPC::LR);
+    BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg).addReg(PPC::LR);
     GlobalBaseInitialized = true;
   }
   // Emit our copy of GlobalBaseReg to the destination register in the


Index: llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.5 llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.6
--- llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.5	Wed Sep  1 17:55:36 2004
+++ llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp	Mon Sep 27 00:07:25 2004
@@ -78,7 +78,7 @@
 
   unsigned OC = Opcode[getIdx(RC)];
   if (SrcReg == PPC::LR) {
-    BuildMI(MBB, MI, PPC::MFLR, 0, PPC::R11);
+    BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR);
     BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
     addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx);
   } else {