[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.td

[Alkis Evlogimenos]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.td updated: 1.14 -> 1.15
---
Log message:

The real x87 floating point registers should not be allocatable. They
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.


---
Diffs of the changes:  (+10 -2)

Index: llvm/lib/Target/X86/X86RegisterInfo.td
diff -u llvm/lib/Target/X86/X86RegisterInfo.td:1.14 llvm/lib/Target/X86/X86RegisterInfo.td:1.15
--- llvm/lib/Target/X86/X86RegisterInfo.td:1.14	Tue Sep 14 20:40:18 2004
+++ llvm/lib/Target/X86/X86RegisterInfo.td	Tue Sep 21 16:22:11 2004
@@ -86,5 +86,13 @@
 
 def RFP : RegisterClass<f80, 32, [FP0, FP1, FP2, FP3, FP4, FP5, FP6]>;
 
-// Floating point stack registers.
-def RST : RegisterClass<f80, 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]>;
+// Floating point stack registers (these are not allocatable by the
+// register allocator - the floating point stackifier is responsible
+// for transforming FPn allocations to STn registers)
+def RST : RegisterClass<f80, 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]> {
+  let Methods = [{
+    iterator allocation_order_end(MachineFunction &MF) const {
+      return begin();
+    }
+  }];
+}