[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp X86RegisterInfo.h
Chris Lattner
lattner at cs.uiuc.edu
Sun Aug 15 15:15:19 PDT 2004
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.90 -> 1.91
X86RegisterInfo.h updated: 1.27 -> 1.28
---
Log message:
Code insertion methods now return void instead of an int.
---
Diffs of the changes: (+20 -23)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.90 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.91
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.90 Sun Aug 15 16:56:12 2004
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Sun Aug 15 17:15:08 2004
@@ -54,37 +54,34 @@
}
}
-int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned SrcReg, int FrameIdx) const {
+void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned SrcReg, int FrameIdx) const {
static const unsigned Opcode[] =
{ X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FSTP80m };
const TargetRegisterClass *RC = getRegClass(SrcReg);
MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
FrameIdx).addReg(SrcReg);
MBB.insert(MI, I);
- return 1;
}
-int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, int FrameIdx) const{
+void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, int FrameIdx)const{
static const unsigned Opcode[] =
{ X86::MOV8rm, X86::MOV16rm, X86::MOV32rm, X86::FLD80m };
const TargetRegisterClass *RC = getRegClass(DestReg);
unsigned OC = Opcode[getIdx(RC)];
MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
- return 1;
}
-int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const {
+void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const {
static const unsigned Opcode[] =
{ X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV };
MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
- return 1;
}
static MachineInstr *MakeMInst(unsigned Opcode, unsigned FrameIndex,
Index: llvm/lib/Target/X86/X86RegisterInfo.h
diff -u llvm/lib/Target/X86/X86RegisterInfo.h:1.27 llvm/lib/Target/X86/X86RegisterInfo.h:1.28
--- llvm/lib/Target/X86/X86RegisterInfo.h:1.27 Sun Aug 15 16:56:12 2004
+++ llvm/lib/Target/X86/X86RegisterInfo.h Sun Aug 15 17:15:08 2004
@@ -27,18 +27,18 @@
const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
/// Code Generation virtual methods...
- int storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned SrcReg, int FrameIndex) const;
-
- int loadRegFromStackSlot(MachineBasicBlock &MBB,
+ void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
- unsigned DestReg, int FrameIndex) const;
+ unsigned SrcReg, int FrameIndex) const;
+
+ void loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, int FrameIndex) const;
- int copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const;
+ void copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const;
/// foldMemoryOperand - If this target supports it, fold a load or store of
/// the specified stack slot into the specified machine instruction for the
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