[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td

Misha Brukman brukman at cs.uiuc.edu
Wed Aug 11 17:10:11 PDT 2004



Changes in directory llvm/lib/Target/PowerPC:

PowerPCRegisterInfo.td updated: 1.9 -> 1.10
---
Log message:

Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64


---
Diffs of the changes:  (+6 -3)

Index: llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td:1.9 llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td:1.10
--- llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td:1.9	Wed Aug 11 18:44:55 2004
+++ llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td	Wed Aug 11 19:10:01 2004
@@ -77,13 +77,16 @@
 // then nonvolatiles in reverse order since stmw/lmw save from rN to r31
 def GPRC : 
   RegisterClass<i32, 4, 
-    [R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, 
+    [R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, 
      R31, R30, R29, R28, R27, R26, R25, R24, R23, R22, R21, R20, R19, R18, R17,
-     R16, R15, R14, R13, R0, R2, R1, LR]>
+     R16, R15, R14, R13, R0, R1, LR]>
 {
   let Methods = [{
+    iterator allocation_order_begin(MachineFunction &MF) const {
+      return begin() + (AIX ? 1 : 0);
+    }
     iterator allocation_order_end(MachineFunction &MF) const {
-      return end() - (AIX ? 4 : 3);
+      return end() - 3;
     }
   }];
 }






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