[llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86AsmPrinter.cpp updated: 1.113 -> 1.114
X86InstrInfo.td updated: 1.99 -> 1.100
---
Log message:

Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls.


---
Diffs of the changes:  (+12 -1)

Index: llvm/lib/Target/X86/X86AsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.113 llvm/lib/Target/X86/X86AsmPrinter.cpp:1.114
--- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.113	Wed Aug 11 01:09:55 2004
+++ llvm/lib/Target/X86/X86AsmPrinter.cpp	Wed Aug 11 01:59:12 2004
@@ -115,6 +115,10 @@
       }
     }
 
+    void printCallOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT) {
+      printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
+    }
+
     void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
                             MVT::ValueType VT) {
       switch (VT) {
@@ -618,6 +622,9 @@
   if (printInstruction(MI))
     return;   // Printer was automatically generated
 
+  MI->dump();
+  abort();
+
   unsigned Opcode = MI->getOpcode();
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetInstrDescriptor &Desc = TII.get(Opcode);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.99 llvm/lib/Target/X86/X86InstrInfo.td:1.100
--- llvm/lib/Target/X86/X86InstrInfo.td:1.99	Wed Aug 11 01:50:10 2004
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Aug 11 01:59:12 2004
@@ -29,6 +29,10 @@
 def f64mem : X86MemOperand<f64>;
 def f80mem : X86MemOperand<f80>;
 
+// PCRelative calls need special operand formatting.
+let PrintMethod = "printCallOperand" in
+  def calltarget : Operand<i32>;
+
 // Format specifies the encoding used by the instruction.  This is part of the
 // ad-hoc solution used to emit machine instruction encodings by our machine
 // code emitter.
@@ -196,7 +200,7 @@
 let isCall = 1 in
   // All calls clobber the non-callee saved registers...
   let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6] in {
-    def CALLpcrel32 : X86Inst<"call", 0xE8, RawFrm, NoMem, NoImm>;  // FIXME: 'call' doesn't allow 'OFFSET'
+    def CALLpcrel32 : I<0xE8, RawFrm, (ops calltarget:$dst), "call $dst">;
     def CALL32r     : I<0xFF, MRM2r, (ops R32:$dst), "call $dst">;
     def CALL32m     : I<0xFF, MRM2m, (ops i32mem:$dst), "call $dst">;
   }