[llvm-commits] CVS: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp

Brian Gaeke gaeke at cs.uiuc.edu
Tue Jun 8 13:55:11 PDT 2004


Changes in directory reopt/lib/LightWtProfiling:

UnpackTraceFunction.cpp updated: 1.80 -> 1.81

---
Log message:

Expand head-of-file comment.
Prune #includes; add some others we'll need. 

Add a new RegStr method used to print out registers in a uniform way.

Don't erase the entry BB in rewriteProlog; sometimes the code generator
puts important stuff there.  Instead, just delete the old prolog instrs.

Add a new copyConstantToRegister method.
Use it to try to deal with live-outs that have been turned into constants in
the TraceFn.


---
Diffs of the changes:  (+90 -45)

Index: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp
diff -u reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.80 reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.81
--- reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.80	Fri Jun  4 12:58:24 2004
+++ reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp	Tue Jun  8 13:53:56 2004
@@ -9,21 +9,21 @@
 //
 // Pass to convert functions, which had previously been converted from
 // traces into functions, back into traces, and reattach them to the functions
-// they came from.
+// they came from. Runs *after* instruction selection and register allocation.
 //
 //===----------------------------------------------------------------------===//
 
 #include "reopt/UnpackTraceFunction.h"
 #include "reopt/TraceToFunction.h"
-#include "reopt/MappingInfo.h"
-#include "llvm/CodeGen/MachineFunctionInfo.h"
+#include "reopt/MappingInfo.h"                      // for getBasicBlockInfo()
+#include "llvm/CodeGen/InstrSelection.h"            // for TmpInstruction
+#include "llvm/CodeGen/MachineFunctionInfo.h"       // for getStaticStackSize()
+#include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/Module.h"
-#include "llvm/Argument.h"
 #include "llvm/Assembly/Writer.h"
-#include "llvm/Support/InstIterator.h"
+#include "Support/StringExtras.h"                   // for utostr()
 #include "Support/Debug.h"
 #include "../../../../lib/Target/SparcV9/RegAlloc/AllocInfo.h"
-#include "../../../../lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h"
 #include "../../../../lib/Target/SparcV9/SparcV9RegInfo.h"
 #include "../../../../lib/Target/SparcV9/SparcV9TargetMachine.h"
 
@@ -127,7 +127,7 @@
   DEBUG(std::cerr << "findRegsToSave: RegsToSave (size " 
         << RegsToSave.size () << ") contains: (";
         for (std::set<unsigned>::iterator i = RegsToSave.begin (),
-             e = RegsToSave.end (); i != e; ++i) { std::cerr << *i << " "; }
+             e = RegsToSave.end (); i != e; ++i) { std::cerr << RegStr (*i) << " "; }
         std::cerr << " )\n");
 }
 
@@ -136,24 +136,36 @@
   return 2047 + StaticStackSize + 176 + R * 8;
 }
 
+std::string UnpackTraceFunction::RegStr (const unsigned R) const {
+  static const char *RegTypeStrings[] = { "INT", "FPS",
+    "FPD", "INTCC", "FPCC", "SPCL" };
+  const SparcV9RegInfo &TRI = *TM->getRegInfo ();
+  unsigned RegType = TRI.getRegType (R);
+  const char *RegName = TRI.getUnifiedRegName (R);
+  return std::string("reg#")  + utostr(R) + "(" + RegTypeStrings[RegType] + ")=%" + RegName;
+}
+
 void UnpackTraceFunction::rewriteProlog (MachineFunction &MF,
-                                         MachineBasicBlock &E) {
+                                         MachineBasicBlock &EntryBB) {
   const SparcV9RegInfo &TRI = *TM->getRegInfo ();
   static const unsigned sp = SparcV9::o6, fp = SparcV9::i6, g1 = SparcV9::g1,
     g2 = SparcV9::g2;
 
-  // UTF prolog: start out by clearing everything out of the entry basic block
-  // (FIXME: may not work once we start doing optimizations!!! We will probably
-  // have to use a separate MBB)
-  E.clear ();
+  // UTF prolog: start out by clearing SAVE and stack-load instructions out
+  // of the entry BB.
+  while (EntryBB.front().getOpcode() == V9::SAVEi
+         || EntryBB.front().getOpcode() == V9::LDXi)
+    EntryBB.pop_front();
+
+  std::vector<MachineInstr *> E;
 
   // 0. Save caller's stack pointer in %g1.
-  BuildMI (&E, V9::ORr, 3).addMReg (sp).addZImm (0)
-    .addMReg (g1, MachineOperand::Def);
+  E.push_back (BuildMI (V9::ORr, 3).addMReg (sp).addZImm (0)
+    .addMReg (g1, MachineOperand::Def));
 
   // 1. Emit ADD instruction to allocate the right amount of stack space.
-  BuildMI (&E, V9::ADDi, 3).addMReg (sp).addSImm (-TotalStackSize)
-    .addMReg (sp, MachineOperand::Def);
+  E.push_back (BuildMI (V9::ADDi, 3).addMReg (sp).addSImm (-TotalStackSize)
+    .addMReg (sp, MachineOperand::Def));
 
   // 2. Save used registers onto the stack.
   std::vector<MachineInstr *> mvec;
@@ -162,26 +174,16 @@
        e = RegsToSave.end (); i != e; ++i) {
     mvec.clear ();
     unsigned R = *i;
-    unsigned RegType = TRI.getRegType (R);
-
-    static const char *RegTypeStrings[] = { "IntRegType", "FPSingleRegType",
-      "FPDoubleRegType", "IntCCRegType", "FloatCCRegType", "SpecialRegType" };
-    static const char *RegClassStrings[] = { "IntRegClassID",
-      "FloatRegClassID", "IntCCRegClassID", "FloatCCRegClassID",
-      "SpecialRegClassID" };
-    DEBUG (std::cerr << "rewriteProlog: Saving reg#" << R << ", type = "
-           << RegType << " (" << RegTypeStrings[RegType]
-           << "), ClassID = " << TRI.getRegClassIDOfRegType(RegType) << " ("
-           << RegClassStrings[TRI.getRegClassIDOfRegType(RegType)] << ")\n");
-    TRI.cpReg2MemMI (mvec, R, sp, stackOffsetForReg (R), RegType, g2);
+    DEBUG (std::cerr << "rewriteProlog: Saving " << RegStr (R) << "\n");
+    TRI.cpReg2MemMI (mvec, R, sp, stackOffsetForReg (R), TRI.getRegType (R), g2);
     for (std::vector<MachineInstr *>::iterator vi = mvec.begin (),
            ve = mvec.end (); vi != ve; ++vi)
       E.push_back (*vi);
   }
 
   // 3. Caller's stack pointer becomes our frame pointer.
-  BuildMI (&E, V9::ORr, 3).addMReg (g1).addZImm (0)
-    .addMReg (fp, MachineOperand::Def);
+  E.push_back (BuildMI (V9::ORr, 3).addMReg (g1).addZImm (0)
+    .addMReg (fp, MachineOperand::Def));
 
   // 4. Insert a copy for each live-in variable to copy it from the stack
   // to the register that was allocated for it in the TraceFn.
@@ -216,12 +218,43 @@
       abort ();
     }
   }
+
+  MachineBasicBlock::iterator MBBIt = EntryBB.begin ();
+  for (std::vector<MachineInstr *>::iterator ei = E.begin (), ee = E.end (); ei != ee; ++ei) {
+    MBBIt = EntryBB.insert (MBBIt, *ei);
+    ++MBBIt;
+  }
+}
+
+void UnpackTraceFunction::copyConstantToRegister (MachineFunction &MF,
+                                                  Constant *C, unsigned Reg,
+                                                  std::vector<MachineInstr *> &mvec) {
+  const TargetInstrInfo &TII = *TM->getInstrInfo ();
+  TmpInstruction *tmp = new TmpInstruction (C);
+  TII.CreateCodeToLoadConst (*TM, const_cast<Function *> (MF.getFunction ()), C, tmp, mvec,
+                             MachineCodeForInstruction::get (tmp));
+  DEBUG (for (std::vector<MachineInstr *>::iterator i = mvec.begin (), e = mvec.end ();
+       i != e; ++i)
+    std::cerr << "copyConstantToRegister Input: " << **i << "\n");
+  assert (mvec.size() == 1);
+  MachineInstr &theInst = *mvec.back();
+  // note: this is pretty seriously hardwired for now. the problem is that in full
+  // generality, this is a little tiny episode of register allocation
+  assert (theInst.getOpcode () == V9::ORi
+          && theInst.getNumOperands () == 3
+          && theInst.getOperand (2).isDef ()
+          && theInst.getOperand (2).getType () == MachineOperand::MO_VirtualRegister);
+  theInst.SetRegForOperand (2, Reg);
+  DEBUG (for (std::vector<MachineInstr *>::iterator i = mvec.begin (), e = mvec.end ();
+       i != e; ++i)
+    std::cerr << "copyConstantToRegister Output: " << **i << "\n");
 }
 
 void UnpackTraceFunction::rewriteEpilog (MachineFunction &MF,
                                          MachineBasicBlock &MBB) {
   const SparcV9RegInfo &TRI = *TM->getRegInfo ();
-  static const unsigned fp = SparcV9::i6, sp = SparcV9::o6, g2 = SparcV9::g2;
+  static const unsigned fp = SparcV9::i6, sp = SparcV9::o6, g1 = SparcV9::g1,
+    g2 = SparcV9::g2;
 
   // UTF epilog: start out by clearing everything out of the exit basic block
   // (FIXME: may not work once we start doing optimizations!!! We will probably
@@ -240,16 +273,31 @@
     // Source is traceFn's register, Target is matrixFn's register
     AllocInfo &Target = ai.first, &Source = ai.second;
     assert (Target.AllocState == AllocInfo::Allocated
-            && Source.AllocState == AllocInfo::Allocated
-            && "FIXME: does not handle live-out values in stack slots yet");
+            && "Live-out values must be in regs in the matrixFn");
     mvec.clear ();
-    unsigned R = Source.Placement;
-    unsigned RegType = TRI.getRegType (R);
-    DEBUG (std::cerr << "rewriteEpilog: saving live-out value: " << V->getName()
-           << " is allocated to reg#" << Target.Placement
-           << " in MatrixFn and reg#" << Source.Placement << " in TraceFn\n");
-    TRI.cpReg2MemMI (mvec, R, sp, stackOffsetForReg (Target.Placement),
-                     RegType, g2);
+    if (Source.AllocState == AllocInfo::NotAllocated) {
+      assert (isa<Constant> (TF->getCorrespondingValue (V, false))
+              && "Can't handle non-constant, non-allocated live-out value in traceFn");
+      copyConstantToRegister (MF, cast<Constant> (TF->getCorrespondingValue (V, false)),
+                              g1, mvec);
+      unsigned R = g1;
+      unsigned RegType = TRI.getRegType (R);
+      DEBUG (std::cerr << "rewriteEpilog: saving live-out value: " << V->getName()
+             << " is allocated to " << RegStr (Target.Placement)
+             << " in MatrixFn and is a constant in TraceFn\n");
+      TRI.cpReg2MemMI (mvec, R, sp, stackOffsetForReg (Target.Placement),
+                       RegType, g2);
+    } else {
+      assert (Source.AllocState == AllocInfo::Allocated
+              && "Can't handle live-out value spilled in traceFn");
+      unsigned R = Source.Placement;
+      unsigned RegType = TRI.getRegType (R);
+      DEBUG (std::cerr << "rewriteEpilog: saving live-out value: " << V->getName()
+             << " is allocated to " << RegStr (Target.Placement)
+             << " in MatrixFn and " << RegStr (Source.Placement) << " in TraceFn\n");
+      TRI.cpReg2MemMI (mvec, R, sp, stackOffsetForReg (Target.Placement),
+                       RegType, g2);
+    }
     for (std::vector<MachineInstr *>::iterator vi = mvec.begin (),
            ve = mvec.end (); vi != ve; ++vi)
       MBB.push_back (*vi);
@@ -271,11 +319,8 @@
          e = RegsToSave.end (); i != e; ++i) {
     mvec.clear ();
     unsigned R = *i;
-    unsigned RegType = TRI.getRegType (R);
-    DEBUG (std::cerr << "rewriteEpilog: Reloading reg#" << R << ", type = "
-           << RegType << ", " << "ClassID = "
-           << TRI.getRegClassIDOfRegType(RegType) << "\n");
-    TRI.cpMem2RegMI (mvec, sp, stackOffsetForReg (R), R, RegType, g2);
+    DEBUG (std::cerr << "rewriteEpilog: Reloading " << RegStr (R) << "\n");
+    TRI.cpMem2RegMI (mvec, sp, stackOffsetForReg (R), R, TRI.getRegType (R), g2);
     for (std::vector<MachineInstr *>::iterator vi = mvec.begin (),
            ve = mvec.end (); vi != ve; ++vi)
       MBB.push_back (*vi);





More information about the llvm-commits mailing list