[llvm-commits] CVS: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp

[Brian Gaeke]

Changes in directory reopt/lib/LightWtProfiling:

UnpackTraceFunction.cpp updated: 1.59 -> 1.60

---
Log message:

Fix problems with stack pointer oddness (literally).
Simplify code by using the new SparcV9:: names for the unified register numbers.
Re-enable epilog rewriting.
Restore stack pointer before returning to the MatrixFn.


---
Diffs of the changes:  (+20 -33)

Index: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp
diff -u reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.59 reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.60
--- reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.59	Wed Apr 28 12:15:30 2004
+++ reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp	Mon May 10 16:06:20 2004
@@ -222,27 +222,17 @@
   // only put %fsr in the set, not the floatcc regs which were actually used.
   // If the intcc regs are used, then we only put %ccr in the
   // set, not the individual intcc regs.
-  if (floatCCRegSeen) {
-    unsigned fsrReg = TRI.getUnifiedRegNum(SparcV9RegInfo::SpecialRegClassID,
-                                           SparcV9SpecialRegClass::fsr);
-    regsUsed.insert (fsrReg);
-  }
-  if (intCCRegSeen) {
-    unsigned ccrReg = TRI.getUnifiedRegNum(SparcV9RegInfo::IntCCRegClassID,
-                                           SparcV9IntCCRegClass::ccr);
-    regsUsed.insert (ccrReg);
-  }
+  if (floatCCRegSeen)
+    regsUsed.insert (SparcV9::fsr);
+  if (intCCRegSeen)
+    regsUsed.insert (SparcV9::ccr);
 }
 
 void UnpackTraceFunction::rewriteProlog (MachineFunction &MF,
                                          MachineBasicBlock &E) {
   const TargetRegInfo &TRI = TM->getRegInfo ();
-  static const unsigned 
-fp = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::i6),
-sp = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::o6),
-g0 = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::g0),
-g1 = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::g1),
-g2 = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::g2);
+  static const unsigned fp = SparcV9::i6, sp = SparcV9::o6, g0 = SparcV9::g0,
+    g1 = SparcV9::g1, g2 = SparcV9::g2;
 
   // UTF prolog: start out by clearing everything out of the entry basic block
   // (FIXME: may not work once we start doing optimizations!!! We will probably
@@ -265,8 +255,8 @@
              e = regsUsed.end (); i != e; ++i) { std::cerr << *i << " "; });
   DEBUG(std::cerr << " )\n");
 
-  // 2. Get some stack space: (Stack Frame Size + Space for Regs).
-  int Size = (stackSize + 104 * 8);
+  // 2. Get some stack space: (Stack Frame Size + Slop + Space for Regs).
+  int Size = (stackSize + 176 + 104 * 8);
   E.push_back (BuildMI (V9::ADDi, 3).addMReg (sp).addSImm (-Size).addMReg (sp,
     MachineOperand::Def));
 
@@ -290,7 +280,7 @@
                      << " ("
                      << RegClassStrings[TRI.getRegClassIDOfRegType(RegType)]
                      << ")\n");
-    TRI.cpReg2MemMI (mvec, R, sp, stackSize + R * 8, RegType, g2);
+    TRI.cpReg2MemMI (mvec, R, sp, 2047 + stackSize + 176 + R * 8, RegType, g2);
     // Add whatever the TargetRegInfo gave us to the MachineBasicBlock we are
     // working on.
     for (std::vector<MachineInstr *>::iterator vi = mvec.begin (),
@@ -476,14 +466,9 @@
 
 void UnpackTraceFunction::rewriteEpilog (MachineFunction &MF,
                                          MachineBasicBlock &MBB) {
-  return; // FIXME - disabling epilog rewriting for now
   const TargetRegInfo &TRI = TM->getRegInfo ();
-  static const unsigned 
-fp = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::i6),
-sp = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::o6),
-g0 = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::g0),
-g1 = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::g1),
-g2 = TRI.getUnifiedRegNum(SparcV9RegInfo::IntRegClassID,SparcV9IntRegClass::g2);
+  static const unsigned fp = SparcV9::i6, sp = SparcV9::o6, g0 = SparcV9::g0,
+    g1 = SparcV9::g1, g2 = SparcV9::g2;
   Function *TraceF = TF->TraceFn, *MatrixF = TF->MatrixFn;
   LiveVariableSet &So = TF->LiveOutSet;
 
@@ -495,12 +480,10 @@
   // Restore old FP.
   std::vector<MachineInstr *> mvec;
   unsigned stackSize = getStaticStackSize (MF);
-  TRI.cpMem2RegMI (mvec, sp, stackSize + fp * 8, fp, TRI.getRegType(fp), g2);
-
-  // Add whatever the TargetRegInfo gave us to the MachineBasicBlock we are
-  // working on.
+  TRI.cpMem2RegMI (mvec, sp, 2047 + stackSize + 176 + fp * 8, fp,
+                   TRI.getRegType(fp), g2);
   for (std::vector<MachineInstr *>::iterator vi = mvec.begin (),
-         ve = mvec.end (); vi != ve; ++vi)
+       ve = mvec.end (); vi != ve; ++vi)
     MBB.push_back (*vi);
 
   // Insert copies from each live-out variable's reg. in the trace
@@ -527,14 +510,18 @@
     DEBUG (std::cerr << "rewriteEpilog: Reloading reg#" << R << ", type = "
                      << RegType << ", " << "Class = "
                      << TRI.getRegClassIDOfRegType(RegType) << "\n");
-    TRI.cpMem2RegMI (mvec, sp, stackSize + R * 8, R, RegType, g2);
-
+    TRI.cpMem2RegMI (mvec, sp, 2047 + stackSize + 176 + R * 8, R, RegType, g2);
     // Add whatever the TargetRegInfo gave us to the MachineBasicBlock we are
     // working on.
     for (std::vector<MachineInstr *>::iterator vi = mvec.begin (),
            ve = mvec.end (); vi != ve; ++vi)
       MBB.push_back (*vi);
   }
+
+  // Restore stack pointer.
+  int Size = (stackSize + 176 + 104 * 8);
+  MBB.push_back (BuildMI (V9::ADDi, 3).addMReg (sp).addSImm (Size).addMReg (sp,
+    MachineOperand::Def));
 
   // Let ReturnAddress be the address in memory of the compiled
   // code for the MachineBasicBlock in MatrixF that RI would have