[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.246 -> 1.247

---
Log message:

Codegen floating point stores of constants into integer instructions.  This
allows us to compile:

store float 10.0, float* %P

into:
        mov DWORD PTR [%EAX], 1092616192

instead of:

.CPItest_0:                                     # float 0x4024000000000000
.long   1092616192      # float 10
...
        fld DWORD PTR [.CPItest_0]
        fstp DWORD PTR [%EAX]
 


---
Diffs of the changes:  (+37 -15)

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.246 llvm/lib/Target/X86/InstSelectSimple.cpp:1.247
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.246	Fri May  7 14:55:55 2004
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri May  7 16:18:15 2004
@@ -2879,23 +2879,45 @@
   } else if (ConstantBool *CB = dyn_cast<ConstantBool>(I.getOperand(0))) {
     addFullAddress(BuildMI(BB, X86::MOV8mi, 5),
                    BaseReg, Scale, IndexReg, Disp).addImm(CB->getValue());
-  } else {    
-    if (Class == cLong) {
-      unsigned ValReg = getReg(I.getOperand(0));
-      addFullAddress(BuildMI(BB, X86::MOV32mr, 5),
-                     BaseReg, Scale, IndexReg, Disp).addReg(ValReg);
-      addFullAddress(BuildMI(BB, X86::MOV32mr, 5),
-                     BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1);
+  } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0))) {
+    // Store constant FP values with integer instructions to avoid having to
+    // load the constants from the constant pool then do a store.
+    if (CFP->getType() == Type::FloatTy) {
+      union {
+        unsigned I;
+        float    F;
+      } V;
+      V.F = CFP->getValue();
+      addFullAddress(BuildMI(BB, X86::MOV32mi, 5),
+                     BaseReg, Scale, IndexReg, Disp).addImm(V.I);
     } else {
-      unsigned ValReg = getReg(I.getOperand(0));
-      static const unsigned Opcodes[] = {
-        X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m
-      };
-      unsigned Opcode = Opcodes[Class];
-      if (ValTy == Type::DoubleTy) Opcode = X86::FST64m;
-      addFullAddress(BuildMI(BB, Opcode, 1+4),
-                     BaseReg, Scale, IndexReg, Disp).addReg(ValReg);
+      union {
+        uint64_t I;
+        double   F;
+      } V;
+      V.F = CFP->getValue();
+      addFullAddress(BuildMI(BB, X86::MOV32mi, 5),
+                     BaseReg, Scale, IndexReg, Disp).addImm((unsigned)V.I);
+      addFullAddress(BuildMI(BB, X86::MOV32mi, 5),
+                     BaseReg, Scale, IndexReg, Disp+4).addImm(
+                                                          unsigned(V.I >> 32));
     }
+    
+  } else if (Class == cLong) {
+    unsigned ValReg = getReg(I.getOperand(0));
+    addFullAddress(BuildMI(BB, X86::MOV32mr, 5),
+                   BaseReg, Scale, IndexReg, Disp).addReg(ValReg);
+    addFullAddress(BuildMI(BB, X86::MOV32mr, 5),
+                   BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1);
+  } else {
+    unsigned ValReg = getReg(I.getOperand(0));
+    static const unsigned Opcodes[] = {
+      X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m
+    };
+    unsigned Opcode = Opcodes[Class];
+    if (ValTy == Type::DoubleTy) Opcode = X86::FST64m;
+    addFullAddress(BuildMI(BB, Opcode, 1+4),
+                   BaseReg, Scale, IndexReg, Disp).addReg(ValReg);
   }
 }