[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.242 -> 1.243

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Log message:

Improve code generated for integer multiplications by 2,3,5,9


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Diffs of the changes:  (+16 -2)

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.242 llvm/lib/Target/X86/InstSelectSimple.cpp:1.243
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.242	Sat May  1 16:29:16 2004
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Tue May  4 10:47:14 2004
@@ -2196,15 +2196,29 @@
                            unsigned op0Reg, unsigned ConstRHS) {
   static const unsigned MOVrrTab[] = {X86::MOV8rr, X86::MOV16rr, X86::MOV32rr};
   static const unsigned MOVriTab[] = {X86::MOV8ri, X86::MOV16ri, X86::MOV32ri};
+  static const unsigned ADDrrTab[] = {X86::ADD8rr, X86::ADD16rr, X86::ADD32rr};
 
   unsigned Class = getClass(DestTy);
 
-  if (ConstRHS == 0) {
+  // Handle special cases here.
+  switch (ConstRHS) {
+  case 0:
     BuildMI(*MBB, IP, MOVriTab[Class], 1, DestReg).addImm(0);
     return;
-  } else if (ConstRHS == 1) {
+  case 1:
     BuildMI(*MBB, IP, MOVrrTab[Class], 1, DestReg).addReg(op0Reg);
     return;
+  case 2:
+    BuildMI(*MBB, IP, ADDrrTab[Class], 1,DestReg).addReg(op0Reg).addReg(op0Reg);
+    return;
+  case 3:
+  case 5:
+  case 9:
+    if (Class == cInt) {
+      addFullAddress(BuildMI(*MBB, IP, X86::LEA32r, 5, DestReg),
+                     op0Reg, ConstRHS-1, op0Reg, 0);
+      return;
+    }
   }
 
   // If the element size is exactly a power of 2, use a shift to get it.