[llvm-commits] CVS: llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp

Chris Lattner lattner at cs.uiuc.edu
Tue Apr 27 10:14:01 PDT 2004


Changes in directory llvm/lib/Target/SparcV9/RegAlloc:

PhyRegAlloc.cpp updated: 1.146 -> 1.147

---
Log message:

Changes to fix up the inst_iterator to pass to boost iterator checks.  This 
patch was graciously contributed by Vladimir Prus.


---
Diffs of the changes:  (+4 -4)

Index: llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp:1.146 llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp:1.147
--- llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp:1.146	Wed Mar 31 15:59:59 2004
+++ llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp	Tue Apr 27 10:13:33 2004
@@ -1167,9 +1167,9 @@
   unsigned Insn = 0;
   // Instructions themselves encoded as operand # -1
   for (const_inst_iterator II=inst_begin (Fn), IE=inst_end (Fn); II!=IE; ++II){
-    saveStateForValue (state, (*II), Insn, -1);
-    for (unsigned i = 0; i < (*II)->getNumOperands (); ++i) {
-      const Value *V = (*II)->getOperand (i);
+    saveStateForValue (state, (&*II), Insn, -1);
+    for (unsigned i = 0; i < (*II).getNumOperands (); ++i) {
+      const Value *V = (*II).getOperand (i);
       // Don't worry about it unless it's something whose reg. we'll need. 
       if (!isa<Argument> (V) && !isa<Instruction> (V)) 
         continue; 
@@ -1201,7 +1201,7 @@
   }
   int Insn = 0;
   for (const_inst_iterator II=inst_begin (Fn), IE=inst_end (Fn); II!=IE; ++II) {
-    const Instruction *I = *II;
+    const Instruction *I = &*II;
     MachineCodeForInstruction &Instrs = MachineCodeForInstruction::get (I);
     std::cerr << "Instruction: " << *I
               << "MachineCodeForInstruction:\n";





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