[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.200 -> 1.201

---
Log message:

Generate slightly smaller code, "test R, R" instead of "cmp R, 0"


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Diffs of the changes:  (+3 -5)

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.200 llvm/lib/Target/X86/InstSelectSimple.cpp:1.201
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.200	Wed Mar 31 16:03:35 2004
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Wed Mar 31 16:22:36 2004
@@ -1015,8 +1015,7 @@
           CondReg = X86::BL;
         }
         
-        // FIXME: Should generate a 'tst r, r'
-        BuildMI(*MBB, IP, X86::CMP8ri, 2).addReg(CondReg).addImm(0);
+        BuildMI(*MBB, IP, X86::TEST8rr, 2).addReg(CondReg).addReg(CondReg);
         Opcode = X86::FCMOVE;
       }
       break;
@@ -1047,8 +1046,7 @@
   } else {
     // Get the value being branched on, and use it to set the condition codes.
     unsigned CondReg = getReg(Cond, MBB, IP);
-    // FIXME: Should generate a 'tst r, r'
-    BuildMI(*MBB, IP, X86::CMP8ri, 2).addReg(CondReg).addImm(0);
+    BuildMI(*MBB, IP, X86::TEST8rr, 2).addReg(CondReg).addReg(CondReg);
     switch (SelectClass) {
     default: assert(0 && "Unknown value class!");
     case cFP:    Opcode = X86::FCMOVE; break;
@@ -1209,7 +1207,7 @@
     // Nope, cannot fold setcc into this branch.  Emit a branch on a condition
     // computed some other way...
     unsigned condReg = getReg(BI.getCondition());
-    BuildMI(BB, X86::CMP8ri, 2).addReg(condReg).addImm(0);
+    BuildMI(BB, X86::TEST8rr, 2).addReg(condReg).addReg(condReg);
     if (BI.getSuccessor(1) == NextBB) {
       if (BI.getSuccessor(0) != NextBB)
         BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0));