[llvm-commits] [parallel] CVS: llvm/lib/Target/SparcV9/RegAlloc/AllocInfo.h PhyRegAlloc.cpp PhyRegAlloc.h

Misha Brukman brukman at cs.uiuc.edu
Wed Mar 10 19:05:21 PST 2004


Changes in directory llvm/lib/Target/SparcV9/RegAlloc:

AllocInfo.h updated: 1.5.4.1 -> 1.5.4.2
PhyRegAlloc.cpp updated: 1.131.2.1 -> 1.131.2.2
PhyRegAlloc.h updated: 1.62 -> 1.62.4.1

---
Log message:

Merge from trunk.

---
Diffs of the changes:  (+29 -18)

Index: llvm/lib/Target/SparcV9/RegAlloc/AllocInfo.h
diff -u llvm/lib/Target/SparcV9/RegAlloc/AllocInfo.h:1.5.4.1 llvm/lib/Target/SparcV9/RegAlloc/AllocInfo.h:1.5.4.2
--- llvm/lib/Target/SparcV9/RegAlloc/AllocInfo.h:1.5.4.1	Mon Mar  1 17:58:15 2004
+++ llvm/lib/Target/SparcV9/RegAlloc/AllocInfo.h	Wed Mar 10 19:03:50 2004
@@ -26,8 +26,8 @@
 /// structures to generate mapping information for this register allocator.
 ///
 struct AllocInfo {
-  unsigned Instruction;
-  int Operand; // (-1 if Instruction, or 0...n-1 for an operand.)
+  int Instruction; // (-1 if Argument, or 0 .. n - 1 for an instruction).
+  int Operand; // (-1 if Instruction, or 0 .. n-1 for an operand).
   enum AllocStateTy { NotAllocated = 0, Allocated, Spilled };
   AllocStateTy AllocState;
   int Placement;
@@ -41,7 +41,7 @@
   ///
   static StructType *getConstantType () {
     std::vector<const Type *> TV;
-    TV.push_back (Type::UIntTy);
+    TV.push_back (Type::IntTy);
     TV.push_back (Type::IntTy);
     TV.push_back (Type::UIntTy);
     TV.push_back (Type::IntTy);
@@ -54,7 +54,7 @@
   Constant *toConstant () const {
     StructType *ST = getConstantType ();
     std::vector<Constant *> CV;
-    CV.push_back (ConstantUInt::get (Type::UIntTy, Instruction));
+    CV.push_back (ConstantSInt::get (Type::IntTy, Instruction));
     CV.push_back (ConstantSInt::get (Type::IntTy, Operand));
     CV.push_back (ConstantUInt::get (Type::UIntTy, AllocState));
     CV.push_back (ConstantSInt::get (Type::IntTy, Placement));


Index: llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp:1.131.2.1 llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp:1.131.2.2
--- llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp:1.131.2.1	Mon Mar  1 17:58:15 2004
+++ llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp	Wed Mar 10 19:03:50 2004
@@ -51,12 +51,6 @@
 
 RegAllocDebugLevel_t DEBUG_RA;
 
-/// The reoptimizer wants to be able to grovel through the register
-/// allocator's state after it has done its job. This is a hack.
-///
-PhyRegAlloc::SavedStateMapTy ExportedFnAllocState;
-const bool SaveStateToModule = true;
-
 static cl::opt<RegAllocDebugLevel_t, true>
 DRA_opt("dregalloc", cl::Hidden, cl::location(DEBUG_RA),
         cl::desc("enable register allocation debugging information"),
@@ -69,8 +63,16 @@
   clEnumValN(RA_DEBUG_Verbose,     "v", "extra debug output"),
                    0));
 
-static cl::opt<bool>
-SaveRegAllocState("save-ra-state", cl::Hidden,
+/// The reoptimizer wants to be able to grovel through the register
+/// allocator's state after it has done its job. This is a hack.
+///
+PhyRegAlloc::SavedStateMapTy ExportedFnAllocState;
+bool SaveRegAllocState = false;
+bool SaveStateToModule = true;
+static cl::opt<bool, true>
+SaveRegAllocStateOpt("save-ra-state", cl::Hidden,
+                  cl::location (SaveRegAllocState),
+                  cl::init(false),
                   cl::desc("write reg. allocator state into module"));
 
 FunctionPass *getRegisterAllocator(TargetMachine &T) {
@@ -1125,7 +1127,7 @@
 
 
 void PhyRegAlloc::saveStateForValue (std::vector<AllocInfo> &state,
-                                     const Value *V, unsigned Insn, int Opnd) {
+                                     const Value *V, int Insn, int Opnd) {
   LiveRangeMapType::const_iterator HMI = LRI->getLiveRangeMap ()->find (V); 
   LiveRangeMapType::const_iterator HMIEnd = LRI->getLiveRangeMap ()->end ();   
   AllocInfo::AllocStateTy AllocState = AllocInfo::NotAllocated; 
@@ -1155,7 +1157,15 @@
 ///
 void PhyRegAlloc::saveState () {
   std::vector<AllocInfo> &state = FnAllocState[Fn];
+  unsigned ArgNum = 0;
+  // Arguments encoded as instruction # -1
+  for (Function::const_aiterator i=Fn->abegin (), e=Fn->aend (); i != e; ++i) {
+    const Argument *Arg = &*i;
+    saveStateForValue (state, Arg, -1, ArgNum);
+    ++ArgNum;
+  }
   unsigned Insn = 0;
+  // Instructions themselves encoded as operand # -1
   for (const_inst_iterator II=inst_begin (Fn), IE=inst_end (Fn); II!=IE; ++II){
     saveStateForValue (state, (*II), Insn, -1);
     for (unsigned i = 0; i < (*II)->getNumOperands (); ++i) {
@@ -1176,7 +1186,7 @@
 ///
 void PhyRegAlloc::verifySavedState () {
   std::vector<AllocInfo> &state = FnAllocState[Fn];
-  unsigned Insn = 0;
+  int Insn = 0;
   for (const_inst_iterator II=inst_begin (Fn), IE=inst_end (Fn); II!=IE; ++II) {
     const Instruction *I = *II;
     MachineCodeForInstruction &Instrs = MachineCodeForInstruction::get (I);
@@ -1347,10 +1357,11 @@
   colorIncomingArgs();
 
   // Save register allocation state for this function in a Constant.
-  if (SaveRegAllocState)
+  if (SaveRegAllocState) {
     saveState();
-  if (DEBUG_RA) { // Check our work.
-    verifySavedState ();
+    if (DEBUG_RA) { // Check our work.
+      verifySavedState ();
+    }
   }
 
   // Now update the machine code with register names and add any additional


Index: llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
diff -u llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h:1.62 llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h:1.62.4.1
--- llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h:1.62	Tue Nov 11 16:41:33 2003
+++ llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h	Wed Mar 10 19:03:50 2004
@@ -126,7 +126,7 @@
   void buildInterferenceGraphs();
 
   void saveStateForValue (std::vector<AllocInfo> &state,
-                          const Value *V, unsigned Insn, int Opnd);
+                          const Value *V, int Insn, int Opnd);
   void saveState();
   void verifySavedState();
 





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