[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp

[Brian Gaeke]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8RegisterInfo.cpp updated: 1.4 -> 1.5

---
Log message:

Make prolog align stack properly.  Make epilog not touch any registers.

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Diffs of the changes:  (+4 -4)

Index: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.4 llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.5
--- llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.4	Fri Mar  5 21:54:13 2004
+++ llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp	Fri Mar  5 23:31:21 2004
@@ -71,15 +71,15 @@
 
   // Eventually this should emit the correct save instruction based on the
   // number of bytes in the frame.  For now we just hardcode it.
-  BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP);
+  BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-112).addReg(V8::SP);
 }
 
 void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
                                        MachineBasicBlock &MBB) const {
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
-  assert(MBBI->getOpcode() == V8::JMPLi &&
-         "Can only put epilog before return instruction!");
-  BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7);
+  assert(MBBI->getOpcode() == V8::RETL &&
+         "Can only put epilog before 'retl' instruction!");
+  BuildMI(MBB, MBBI, V8::RESTORErr, 2, V8::G0).addReg(V8::G0).addReg(V8::G0);
 }