[llvm-commits] CVS: llvm/lib/Target/SparcV8/InstSelectSimple.cpp SparcV8InstrInfo.td

[Brian Gaeke]

Changes in directory llvm/lib/Target/SparcV8:

InstSelectSimple.cpp updated: 1.3 -> 1.4
SparcV8InstrInfo.td updated: 1.3 -> 1.4

---
Log message:

Subtract instructions; minor cleanups

---
Diffs of the changes:  (+10 -5)

Index: llvm/lib/Target/SparcV8/InstSelectSimple.cpp
diff -u llvm/lib/Target/SparcV8/InstSelectSimple.cpp:1.3 llvm/lib/Target/SparcV8/InstSelectSimple.cpp:1.4
--- llvm/lib/Target/SparcV8/InstSelectSimple.cpp:1.3	Wed Mar  3 18:56:25 2004
+++ llvm/lib/Target/SparcV8/InstSelectSimple.cpp	Wed Mar  3 22:37:45 2004
@@ -165,9 +165,8 @@
 void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
                                     MachineBasicBlock::iterator IP,
                                     Constant *C, unsigned R) {
-  if (C->getType()->isIntegral()) {
+  if (ConstantInt *CI = dyn_cast<ConstantInt> (C)) {
     unsigned Class = getClass(C->getType());
-    ConstantInt *CI = cast<ConstantInt>(C);
     switch (Class) {
       case cByte:
         BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
@@ -185,12 +184,12 @@
         return;
       }
       default:
-        assert (0 && "Can't move this kind of constant");
+        assert (0 && "Can't copy this kind of constant into register yet");
         return;
     }
   }
 
-  assert (0 && "Can't copy constants into registers yet");
+  assert (0 && "Can't copy this kind of constant into register yet");
 }
 
 bool V8ISel::runOnFunction(Function &Fn) {
@@ -245,6 +244,9 @@
   switch (I.getOpcode ()) {
     case Instruction::Add: 
       BuildMI (BB, V8::ADDrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
+      break;
+    case Instruction::Sub: 
+      BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
       break;
     default:
 	  visitInstruction (I);


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.3 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.4
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.3	Wed Mar  3 18:56:25 2004
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Wed Mar  3 22:37:45 2004
@@ -62,7 +62,7 @@
   let Name = "call";
 }
 
-// Section B.9 - SETHI Instruction, p. 102
+// Section B.9 - SETHI Instruction, p. 104
 def SETHIi: F2_1<0b100, "sethi">;
 
 // Section B.11 - Logical Instructions, p. 106
@@ -77,6 +77,9 @@
 
 // Section B.13 - Add Instructions, p. 108
 def ADDrr : F3_1<2, 0b000000, "add">;
+
+// Section B.15 - Subtract Instructions, p. 110
+def SUBrr : F3_1<2, 0b000100, "sub">;
 
 // Section B.25 - Jump and Link, p. 126
 def JMPLr : F3_1<2, 0b111000, "jmpl">;              // jmpl [rs1+rs2], rd