[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp VirtRegMap.h VirtRegMap.cpp Passes.cpp
Alkis Evlogimenos
alkis at cs.uiuc.edu
Mon Mar 1 17:19:04 PST 2004
Changes in directory llvm/lib/CodeGen:
RegAllocLinearScan.cpp updated: 1.68 -> 1.69
VirtRegMap.h updated: 1.8 -> 1.9
VirtRegMap.cpp updated: 1.7 -> 1.8
Passes.cpp updated: 1.5 -> 1.6
---
Log message:
Add a spiller option to llc. A simple spiller will come soon. When we get CFG in the machine code represenation a global spiller will also be possible. Also document the linear scan register allocator but mark it as experimental for now.
---
Diffs of the changes: (+74 -46)
Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.68 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.69
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.68 Mon Mar 1 14:05:10 2004
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Mon Mar 1 17:18:15 2004
@@ -41,6 +41,7 @@
std::auto_ptr<PhysRegTracker> prt_;
std::auto_ptr<VirtRegMap> vrm_;
+ std::auto_ptr<Spiller> spiller_;
typedef std::vector<float> SpillWeights;
SpillWeights spillWeights_;
@@ -147,12 +148,13 @@
li_ = &getAnalysis<LiveIntervals>();
if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
vrm_.reset(new VirtRegMap(*mf_));
+ if (!spiller_.get()) spiller_.reset(createSpiller());
initIntervalSets(li_->getIntervals());
linearScan();
- eliminateVirtRegs(*mf_, *vrm_);
+ spiller_->runOnMachineFunction(*mf_, *vrm_);
return true;
}
Index: llvm/lib/CodeGen/VirtRegMap.h
diff -u llvm/lib/CodeGen/VirtRegMap.h:1.8 llvm/lib/CodeGen/VirtRegMap.h:1.9
--- llvm/lib/CodeGen/VirtRegMap.h:1.8 Mon Mar 1 14:05:10 2004
+++ llvm/lib/CodeGen/VirtRegMap.h Mon Mar 1 17:18:15 2004
@@ -108,7 +108,14 @@
std::ostream& operator<<(std::ostream& os, const VirtRegMap& li);
- void eliminateVirtRegs(MachineFunction& mf, const VirtRegMap& vrm);
+ struct Spiller {
+ virtual ~Spiller();
+
+ virtual bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) = 0;
+
+ };
+
+ Spiller* createSpiller();
} // End llvm namespace
Index: llvm/lib/CodeGen/VirtRegMap.cpp
diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.7 llvm/lib/CodeGen/VirtRegMap.cpp:1.8
--- llvm/lib/CodeGen/VirtRegMap.cpp:1.7 Mon Mar 1 14:05:10 2004
+++ llvm/lib/CodeGen/VirtRegMap.cpp Mon Mar 1 17:18:15 2004
@@ -22,9 +22,10 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
-#include "Support/Statistic.h"
+#include "Support/CommandLine.h"
#include "Support/Debug.h"
#include "Support/DenseMap.h"
+#include "Support/Statistic.h"
#include "Support/STLExtras.h"
#include <iostream>
@@ -35,6 +36,15 @@
Statistic<> numStores("spiller", "Number of stores added");
Statistic<> numLoads ("spiller", "Number of loads added");
+ enum SpillerName { local };
+
+ cl::opt<SpillerName>
+ SpillerOpt("spiller",
+ cl::desc("Spiller to use: (default: local)"),
+ cl::Prefix,
+ cl::values(clEnumVal(local, " local spiller"),
+ 0),
+ cl::init(local));
}
int VirtRegMap::assignVirt2StackSlot(unsigned virtReg)
@@ -88,41 +98,44 @@
return std::cerr << '\n';
}
+Spiller::~Spiller()
+{
+
+}
+
namespace {
- class Spiller {
+ class LocalSpiller : public Spiller {
typedef std::vector<unsigned> Phys2VirtMap;
typedef std::vector<bool> PhysFlag;
typedef DenseMap<MachineInstr*, VirtReg2IndexFunctor> Virt2MI;
- MachineFunction& mf_;
- const TargetMachine& tm_;
- const TargetInstrInfo& tii_;
- const MRegisterInfo& mri_;
- const VirtRegMap& vrm_;
+ MachineFunction* mf_;
+ const TargetMachine* tm_;
+ const TargetInstrInfo* tii_;
+ const MRegisterInfo* mri_;
+ const VirtRegMap* vrm_;
Phys2VirtMap p2vMap_;
PhysFlag dirty_;
Virt2MI lastDef_;
public:
- Spiller(MachineFunction& mf, const VirtRegMap& vrm)
- : mf_(mf),
- tm_(mf_.getTarget()),
- tii_(tm_.getInstrInfo()),
- mri_(*tm_.getRegisterInfo()),
- vrm_(vrm),
- p2vMap_(mri_.getNumRegs(), 0),
- dirty_(mri_.getNumRegs(), false),
- lastDef_() {
+ bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) {
+ mf_ = &mf;
+ tm_ = &mf_->getTarget();
+ tii_ = &tm_->getInstrInfo();
+ mri_ = tm_->getRegisterInfo();
+ vrm_ = &vrm;
+ p2vMap_.assign(mri_->getNumRegs(), 0);
+ dirty_.assign(mri_->getNumRegs(), false);
+
DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
DEBUG(std::cerr << "********** Function: "
- << mf_.getFunction()->getName() << '\n');
- }
+ << mf_->getFunction()->getName() << '\n');
- void eliminateVirtRegs() {
- for (MachineFunction::iterator mbbi = mf_.begin(),
- mbbe = mf_.end(); mbbi != mbbe; ++mbbi) {
- lastDef_.grow(mf_.getSSARegMap()->getLastVirtReg());
+ for (MachineFunction::iterator mbbi = mf_->begin(),
+ mbbe = mf_->end(); mbbi != mbbe; ++mbbi) {
+ lastDef_.grow(mf_->getSSARegMap()->getLastVirtReg());
DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
eliminateVirtRegsInMbb(*mbbi);
// clear map, dirty flag and last ref
@@ -130,6 +143,7 @@
dirty_.assign(dirty_.size(), false);
lastDef_.clear();
}
+ return true;
}
private:
@@ -137,21 +151,21 @@
MachineBasicBlock::iterator mii,
unsigned physReg) {
unsigned virtReg = p2vMap_[physReg];
- if (dirty_[physReg] && vrm_.hasStackSlot(virtReg)) {
+ if (dirty_[physReg] && vrm_->hasStackSlot(virtReg)) {
assert(lastDef_[virtReg] && "virtual register is mapped "
"to a register and but was not defined!");
MachineBasicBlock::iterator lastDef = lastDef_[virtReg];
MachineBasicBlock::iterator nextLastRef = next(lastDef);
- mri_.storeRegToStackSlot(*lastDef->getParent(),
+ mri_->storeRegToStackSlot(*lastDef->getParent(),
nextLastRef,
physReg,
- vrm_.getStackSlot(virtReg),
- mri_.getRegClass(physReg));
+ vrm_->getStackSlot(virtReg),
+ mri_->getRegClass(physReg));
++numStores;
DEBUG(std::cerr << "added: ";
- prior(nextLastRef)->print(std::cerr, tm_);
+ prior(nextLastRef)->print(std::cerr, *tm_);
std::cerr << "after: ";
- lastDef->print(std::cerr, tm_));
+ lastDef->print(std::cerr, *tm_));
lastDef_[virtReg] = 0;
}
p2vMap_[physReg] = 0;
@@ -162,7 +176,7 @@
MachineBasicBlock::iterator mii,
unsigned physReg) {
vacateJustPhysReg(mbb, mii, physReg);
- for (const unsigned* as = mri_.getAliasSet(physReg); *as; ++as)
+ for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as)
vacateJustPhysReg(mbb, mii, *as);
}
@@ -175,13 +189,13 @@
vacatePhysReg(mbb, mii, physReg);
p2vMap_[physReg] = virtReg;
// load if necessary
- if (vrm_.hasStackSlot(virtReg)) {
- mri_.loadRegFromStackSlot(mbb, mii, physReg,
- vrm_.getStackSlot(virtReg),
- mri_.getRegClass(physReg));
+ if (vrm_->hasStackSlot(virtReg)) {
+ mri_->loadRegFromStackSlot(mbb, mii, physReg,
+ vrm_->getStackSlot(virtReg),
+ mri_->getRegClass(physReg));
++numLoads;
DEBUG(std::cerr << "added: ";
- prior(mii)->print(std::cerr,tm_));
+ prior(mii)->print(std::cerr, *tm_));
lastDef_[virtReg] = mii;
}
}
@@ -208,8 +222,8 @@
// we clear all physical registers that may contain
// the value of the spilled virtual register
VirtRegMap::MI2VirtMap::const_iterator i, e;
- for (tie(i, e) = vrm_.getFoldedVirts(mii); i != e; ++i) {
- unsigned physReg = vrm_.getPhys(i->second);
+ for (tie(i, e) = vrm_->getFoldedVirts(mii); i != e; ++i) {
+ unsigned physReg = vrm_->getPhys(i->second);
if (physReg) vacateJustPhysReg(mbb, mii, physReg);
}
@@ -219,7 +233,7 @@
if (op.isRegister() && op.getReg() && op.isUse() &&
MRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtReg = op.getReg();
- unsigned physReg = vrm_.getPhys(virtReg);
+ unsigned physReg = vrm_->getPhys(virtReg);
handleUse(mbb, mii, virtReg, physReg);
mii->SetMachineOperandReg(i, physReg);
// mark as dirty if this is def&use
@@ -231,7 +245,7 @@
}
// spill implicit defs
- const TargetInstrDescriptor& tid =tii_.get(mii->getOpcode());
+ const TargetInstrDescriptor& tid = tii_->get(mii->getOpcode());
for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
vacatePhysReg(mbb, mii, *id);
@@ -243,13 +257,13 @@
if (MRegisterInfo::isPhysicalRegister(op.getReg()))
vacatePhysReg(mbb, mii, op.getReg());
else {
- unsigned physReg = vrm_.getPhys(op.getReg());
+ unsigned physReg = vrm_->getPhys(op.getReg());
handleDef(mbb, mii, op.getReg(), physReg);
mii->SetMachineOperandReg(i, physReg);
}
}
- DEBUG(std::cerr << '\t'; mii->print(std::cerr, tm_));
+ DEBUG(std::cerr << '\t'; mii->print(std::cerr, *tm_));
}
for (unsigned i = 1, e = p2vMap_.size(); i != e; ++i)
@@ -259,8 +273,13 @@
};
}
-
-void llvm::eliminateVirtRegs(MachineFunction& mf, const VirtRegMap& vrm)
+llvm::Spiller* llvm::createSpiller()
{
- Spiller(mf, vrm).eliminateVirtRegs();
+ switch (SpillerOpt) {
+ default:
+ std::cerr << "no spiller selected";
+ abort();
+ case local:
+ return new LocalSpiller();
+ }
}
Index: llvm/lib/CodeGen/Passes.cpp
diff -u llvm/lib/CodeGen/Passes.cpp:1.5 llvm/lib/CodeGen/Passes.cpp:1.6
--- llvm/lib/CodeGen/Passes.cpp:1.5 Sun Dec 28 01:59:53 2003
+++ llvm/lib/CodeGen/Passes.cpp Mon Mar 1 17:18:15 2004
@@ -26,7 +26,7 @@
cl::Prefix,
cl::values(clEnumVal(simple, " simple register allocator"),
clEnumVal(local, " local register allocator"),
- clEnumVal(linearscan, " linear-scan global register allocator"),
+ clEnumVal(linearscan, " linear scan register allocator (experimental)"),
0),
cl::init(local));
}
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