[llvm-commits] CVS: llvm/lib/Target/X86/README.txt

[Alkis Evlogimenos]

Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.11 -> 1.12

---
Log message:

Add instruction name description.


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Diffs of the changes:  (+19 -2)

Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.11 llvm/lib/Target/X86/README.txt:1.12
--- llvm/lib/Target/X86/README.txt:1.11	Sat Feb 21 23:53:54 2004
+++ llvm/lib/Target/X86/README.txt	Sun Feb 29 12:44:03 2004
@@ -66,7 +66,7 @@
 destination register will show up in the MachineInstr operands vector.  The code
 to generate this instruction looks like this:
 
-  BuildMI(BB, X86::ADDrr32, 2, 1027).addReg(1026).addReg(1025);
+  BuildMI(BB, X86::ADD32rr, 2, 1027).addReg(1026).addReg(1025);
 
 The first argument to BuildMI is the basic block to append the machine
 instruction to, the second is the opcode, the third is the number of operands,
@@ -149,8 +149,25 @@
 way, in the same order.
 
 
+======================
+VI. Instruction naming
+======================
+
+An instruction name consists of the base name, a default operand size
+followed by a character per operand with an optional special size. For
+example:
+
+ADD8rr -> add, 8-bit register, 8-bit register
+
+IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate
+
+IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate
+
+MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
+
+
 ==========================
-VI. TODO / Future Projects
+VII. TODO / Future Projects
 ==========================
 
 Ideas for Improvements: