[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.cpp X86InstrInfo.h
Chris Lattner
lattner at cs.uiuc.edu
Sun Feb 29 00:02:45 PST 2004
Changes in directory llvm/lib/Target/X86:
InstSelectSimple.cpp updated: 1.183 -> 1.184
X86InstrInfo.cpp updated: 1.23 -> 1.24
X86InstrInfo.h updated: 1.34 -> 1.35
---
Log message:
These two virtual methods are never called.
---
Diffs of the changes: (+0 -40)
Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.183 llvm/lib/Target/X86/InstSelectSimple.cpp:1.184
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.183 Sat Feb 28 17:46:44 2004
+++ llvm/lib/Target/X86/InstSelectSimple.cpp Sat Feb 28 23:59:33 2004
@@ -23,7 +23,6 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.23 llvm/lib/Target/X86/X86InstrInfo.cpp:1.24
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.23 Sun Feb 22 13:23:26 2004
+++ llvm/lib/Target/X86/X86InstrInfo.cpp Sat Feb 28 23:59:33 2004
@@ -24,33 +24,6 @@
}
-// createNOPinstr - returns the target's implementation of NOP, which is
-// usually a pseudo-instruction, implemented by a degenerate version of
-// another instruction, e.g. X86: `xchg ax, ax'; SparcV9: `sethi r0, r0, r0'
-//
-MachineInstr* X86InstrInfo::createNOPinstr() const {
- return BuildMI(X86::XCHGrr16, 2).addReg(X86::AX, MachineOperand::UseAndDef)
- .addReg(X86::AX, MachineOperand::UseAndDef);
-}
-
-
-/// isNOPinstr - not having a special NOP opcode, we need to know if a given
-/// instruction is interpreted as an `official' NOP instr, i.e., there may be
-/// more than one way to `do nothing' but only one canonical way to slack off.
-//
-bool X86InstrInfo::isNOPinstr(const MachineInstr &MI) const {
- // Make sure the instruction is EXACTLY `xchg ax, ax'
- if (MI.getOpcode() == X86::XCHGrr16) {
- const MachineOperand &op0 = MI.getOperand(0), &op1 = MI.getOperand(1);
- if (op0.isRegister() && op0.getReg() == X86::AX &&
- op1.isRegister() && op1.getReg() == X86::AX) {
- return true;
- }
- }
- // FIXME: there are several NOOP instructions, we should check for them here.
- return false;
-}
-
bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
unsigned& sourceReg,
unsigned& destReg) const {
Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.34 llvm/lib/Target/X86/X86InstrInfo.h:1.35
--- llvm/lib/Target/X86/X86InstrInfo.h:1.34 Sat Feb 28 16:02:05 2004
+++ llvm/lib/Target/X86/X86InstrInfo.h Sat Feb 28 23:59:33 2004
@@ -178,12 +178,6 @@
///
virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
- /// createNOPinstr - returns the target's implementation of NOP, which is
- /// usually a pseudo-instruction, implemented by a degenerate version of
- /// another instruction, e.g. X86: `xchg ax, ax'; SparcV9: `sethi r0, r0, r0'
- ///
- MachineInstr* createNOPinstr() const;
-
//
// Return true if the instruction is a register to register move and
// leave the source and dest operands in the passed parameters.
@@ -191,12 +185,6 @@
virtual bool isMoveInstr(const MachineInstr& MI,
unsigned& sourceReg,
unsigned& destReg) const;
-
- /// isNOPinstr - not having a special NOP opcode, we need to know if a given
- /// instruction is interpreted as an `official' NOP instr, i.e., there may be
- /// more than one way to `do nothing' but only one canonical way to slack off.
- ///
- bool isNOPinstr(const MachineInstr &MI) const;
// getBaseOpcodeFor - This function returns the "base" X86 opcode for the
// specified opcode number.
More information about the llvm-commits
mailing list