[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.54 -> 1.55

---
Log message:

Add an option to disable spill fusing in the X86 backend


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Diffs of the changes:  (+5 -0)

Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.54 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.55
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.54	Tue Feb 17 00:28:19 2004
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Tue Feb 17 00:30:34 2004
@@ -31,6 +31,9 @@
   cl::opt<bool>
   NoFPElim("disable-fp-elim",
 	   cl::desc("Disable frame pointer elimination optimization"));
+  cl::opt<bool>
+  NoFusing("disable-spill-fusing",
+           cl::desc("Disable fusing of spill code into instructions"));
 }
 
 X86RegisterInfo::X86RegisterInfo()
@@ -106,6 +109,8 @@
 
 bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
                                         unsigned i, int FrameIndex) const {
+  if (NoFusing) return false;
+
   /// FIXME: This should obviously be autogenerated by tablegen when patterns
   /// are available!
   MachineBasicBlock& MBB = *MI->getParent();