[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp RegAllocLocal.cpp PrologEpilogInserter.cpp LiveVariables.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/CodeGen:

RegAllocSimple.cpp updated: 1.50 -> 1.51
RegAllocLocal.cpp updated: 1.45 -> 1.46
PrologEpilogInserter.cpp updated: 1.21 -> 1.22
LiveVariables.cpp updated: 1.23 -> 1.24

---
Log message:

Make dense maps keyed on physical registers smallerusing
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.


---
Diffs of the changes:  (+6 -7)

Index: llvm/lib/CodeGen/RegAllocSimple.cpp
diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.50 llvm/lib/CodeGen/RegAllocSimple.cpp:1.51
--- llvm/lib/CodeGen/RegAllocSimple.cpp:1.50	Fri Feb 13 15:01:20 2004
+++ llvm/lib/CodeGen/RegAllocSimple.cpp	Sun Feb 15 15:37:17 2004
@@ -154,7 +154,7 @@
     // Made to combat the incorrect allocation of r2 = add r1, r1
     std::map<unsigned, unsigned> Virt2PhysRegMap;
 
-    RegsUsed.resize(MRegisterInfo::FirstVirtualRegister);
+    RegsUsed.resize(RegInfo->getNumRegs());
     
     // a preliminary pass that will invalidate any registers that
     // are used by the instruction (including implicit uses)


Index: llvm/lib/CodeGen/RegAllocLocal.cpp
diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.45 llvm/lib/CodeGen/RegAllocLocal.cpp:1.46
--- llvm/lib/CodeGen/RegAllocLocal.cpp:1.45	Fri Feb 13 15:01:20 2004
+++ llvm/lib/CodeGen/RegAllocLocal.cpp	Sun Feb 15 15:37:17 2004
@@ -53,7 +53,7 @@
     std::vector<unsigned> Virt2PhysRegMap;
 
     unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
-      assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
+      assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #");
       assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
              && "VirtReg not in map!");
       return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];


Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.21 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.22
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.21	Sat Feb 14 18:14:20 2004
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp	Sun Feb 15 15:37:17 2004
@@ -98,7 +98,7 @@
     return;
 
   // This bitset contains an entry for each physical register for the target...
-  std::vector<bool> ModifiedRegs(MRegisterInfo::FirstVirtualRegister);
+  std::vector<bool> ModifiedRegs(RegInfo->getNumRegs());
   unsigned MaxCallFrameSize = 0;
   bool HasCalls = false;
 


Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.23 llvm/lib/CodeGen/LiveVariables.cpp:1.24
--- llvm/lib/CodeGen/LiveVariables.cpp:1.23	Wed Feb 11 20:27:10 2004
+++ llvm/lib/CodeGen/LiveVariables.cpp	Sun Feb 15 15:37:17 2004
@@ -187,10 +187,9 @@
   // physical register.  This is a purely local property, because all physical
   // register references as presumed dead across basic blocks.
   //
-  MachineInstr *PhysRegInfoA[MRegisterInfo::FirstVirtualRegister];
-  bool          PhysRegUsedA[MRegisterInfo::FirstVirtualRegister];
-  std::fill(PhysRegInfoA, PhysRegInfoA+MRegisterInfo::FirstVirtualRegister,
-	    (MachineInstr*)0);
+  MachineInstr *PhysRegInfoA[RegInfo->getNumRegs()];
+  bool          PhysRegUsedA[RegInfo->getNumRegs()];
+  std::fill(PhysRegInfoA, PhysRegInfoA+RegInfo->getNumRegs(), (MachineInstr*)0);
   PhysRegInfo = PhysRegInfoA;
   PhysRegUsed = PhysRegUsedA;