[llvm-commits] CVS: reopt/lib/LightWtProfiling/SLI.cpp

[Brian Gaeke]

Changes in directory reopt/lib/LightWtProfiling:

SLI.cpp updated: 1.14 -> 1.15

---
Log message:

Give doInstrumentation() more proper comments, and rename its parameters to
have more easily-recognizable names. Give some assertions better messages.


---
Diffs of the changes:  (+34 -18)

Index: reopt/lib/LightWtProfiling/SLI.cpp
diff -u reopt/lib/LightWtProfiling/SLI.cpp:1.14 reopt/lib/LightWtProfiling/SLI.cpp:1.15
--- reopt/lib/LightWtProfiling/SLI.cpp:1.14	Fri Jan 16 11:02:02 2004
+++ reopt/lib/LightWtProfiling/SLI.cpp	Tue Feb 10 13:17:01 2004
@@ -196,29 +196,45 @@
 //       }
 //     }
 
-void doInstrumentation(uint64_t addr1, uint64_t addr2, VirtualMem *vm){
-  uint64_t endAddr = addr2;
+/// doInstrumentation - Perform second-level instrumentation on a "hot" loop.
+/// brTarget is the address of the beginning of the loop, and branchAddr
+/// is the address of the branch that branches back brTarget, ending the
+/// loop. 
+///
+void doInstrumentation(uint64_t brTarget, uint64_t branchAddr, VirtualMem *vm){
+  uint64_t endAddr = branchAddr;
 
   // Make sure we have already parsed the LLVM bytecode and have the
-  // resulting LLVM Module handy.
+  // resulting LLVM Module handy. This is where we usually first read
+  // in the bytecode.
   if (!M)
     initModules();
   
-  //get BB address
-  BasicBlock *root=NULL, *end=NULL;
-  assert(getReverseBBMap(addr1, M, root) && "Not found root");
-  while(!getReverseBBMap(addr2, M, end))
-    addr2 -= 4;
-
-  assert(root && end && "No root or end found");
-
-  //find backedges
-  std::map<BasicBlock*, BasicBlock*> backEdges; //edge from key->value
+  // Try to get the LLVM BasicBlocks that correspond to the beginning
+  // and end of the hot loop. We can be pretty sure that the brTarget begins
+  // a BasicBlock, but since branchAddr ends a basic block, we must scan 
+  // backwards hoping to find the beginning of its basic block.
+  BasicBlock *root = 0, *end = 0;
+  // FIXME: Rewrite as:
+  // MappingInfo::reconstruct(M)->getBasicBlockForAddress (brTarget);
+  // returning either NULL or a valid BB *.
+  assert(getReverseBBMap(brTarget, M, root)
+         && "Branch target's BasicBlock not found in map!");
+  assert(root && "Branch target mapped to NULL BasicBlock?");
+  while(!getReverseBBMap(branchAddr, M, end))
+    branchAddr -= 4; // Scan backwards until we find it.
+  assert(end && "Back-edge branch mapped to NULL BasicBlock?");
+
+  // Find all the back edges in the CFG of the function where the loop starts,
+  // putting them in backEdges, which will then contain a (source,
+  // sink) pair for every edge.
+  std::map<BasicBlock*, BasicBlock*> backEdges;
   getBackEdges(backEdges, root->getParent());
 
-  //end node
+  // Now we have to find the back-edge in the CFG corresponding to the loop
+  // we want to instrument.
   assert(backEdges.find(end) != backEdges.end() && 
-         "No backedge with end found");
+         "Can't find back-edge to instrument in CFG.");
 
   //get forward edges
   std::map<BasicBlock *, unsigned long> forward;
@@ -336,7 +352,7 @@
             uint64_t target = getBranchTarget(instr, addr);
             trace.push_back(instr);
             trace.push_back(vm->readInstrFrmVm(addr+4, tr, tr2));
-            if(target == addr1){
+            if(target == brTarget){
               trace[index] = getBranchInst(instr, 
                                            (uint64_t)(intptr_t)&trace[0], 
                                            (uint64_t)(intptr_t)&trace[index]);
@@ -407,10 +423,10 @@
   }
   
 
-  if(!tr->addTrace(addr1, endAddr, trace, 0, callMap, branchMap, tr2))
+  if(!tr->addTrace(brTarget, endAddr, trace, 0, callMap, branchMap, tr2))
     std::cerr << "Could not add!\n";
 
-  DEBUG(std::cerr << "Added-SLI-trace\t" << (void *)addr1 << "\t"
+  DEBUG(std::cerr << "Added-SLI-trace\t" << (void *)brTarget << "\t"
         << (void *)endAddr << "\t" << trace.size() << "\n");
 
   for (std::map<uint64_t, int>::iterator MI = toInline.begin(),