[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstrBuilder.h MachineInstr.h

Alkis Evlogimenos alkis at cs.uiuc.edu
Wed Feb 4 16:18:38 PST 2004


Changes in directory llvm/include/llvm/CodeGen:

MachineInstrBuilder.h updated: 1.16 -> 1.17
MachineInstr.h updated: 1.121 -> 1.122

---
Log message:

Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation.


---
Diffs of the changes:  (+11 -14)

Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.16 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.17
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.16	Tue Nov 11 16:41:31 2003
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h	Wed Feb  4 16:17:40 2004
@@ -138,9 +138,10 @@
 /// calls that are expected, it does not include the destination register.
 ///
 inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands,
-                                   unsigned DestReg) {
+                                   unsigned DestReg,
+                                   MOTy::UseType useType = MOTy::Def) {
   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
-                                   true, true)).addReg(DestReg, MOTy::Def);
+                                   true, true)).addReg(DestReg, useType);
 }
 
 


Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.121 llvm/include/llvm/CodeGen/MachineInstr.h:1.122
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.121	Mon Feb  2 19:13:07 2004
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Wed Feb  4 16:17:40 2004
@@ -207,10 +207,6 @@
     return *this;
   }
 
-  bool operator==(const MachineOperand& rhs) const {
-    return regNum == rhs.regNum && opType == rhs.opType;
-  }
-
   // Accessor methods.  Caller is responsible for checking the
   // operand type before invoking the corresponding accessor.
   // 
@@ -285,14 +281,14 @@
     return *SymbolName;
   }
 
-  bool          isUse           () const { return flags & USEFLAG; }
-  bool          isEverUsed      (const MachineInstr&) const;
-  bool		isDef           () const { return flags & DEFFLAG; }
-  bool          isHiBits32      () const { return flags & HIFLAG32; }
-  bool          isEverDefined   (const MachineInstr&) const;
-  bool          isLoBits32      () const { return flags & LOFLAG32; }
-  bool          isHiBits64      () const { return flags & HIFLAG64; }
-  bool          isLoBits64      () const { return flags & LOFLAG64; }
+  bool            isUse           () const { return flags & USEFLAG; }
+  MachineOperand& setUse          ()       { flags |= USEFLAG; return *this; }
+  bool		  isDef           () const { return flags & DEFFLAG; }
+  MachineOperand& setDef          ()       { flags |= DEFFLAG; return *this; }
+  bool            isHiBits32      () const { return flags & HIFLAG32; }
+  bool            isLoBits32      () const { return flags & LOFLAG32; }
+  bool            isHiBits64      () const { return flags & HIFLAG64; }
+  bool            isLoBits64      () const { return flags & LOFLAG64; }
 
   // used to check if a machine register has been allocated to this operand
   bool hasAllocatedReg() const {





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