[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td Printer.cpp

Alkis Evlogimenos alkis at cs.uiuc.edu
Wed Feb 4 11:22:01 PST 2004


Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.18 -> 1.19
Printer.cpp updated: 1.76 -> 1.77

---
Log message:

IMULri* instructions do not require their first two registers operands
to be the same (IOW they are not two address instructions).


---
Diffs of the changes:  (+9 -7)

Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.18 llvm/lib/Target/X86/X86InstrInfo.td:1.19
--- llvm/lib/Target/X86/X86InstrInfo.td:1.18	Tue Feb  3 01:27:50 2004
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Feb  4 11:21:04 2004
@@ -270,10 +270,12 @@
 
 def IMULrr16 : I2A16<"imul", 0xAF, MRMSrcReg>, TB, OpSize, Pattern<(set R16, (times R16, R16))>;
 def IMULrr32 : I2A32<"imul", 0xAF, MRMSrcReg>, TB        , Pattern<(set R32, (times R32, R32))>;
-def IMULri16 : I2A16<"imul", 0x69, MRMSrcReg>,     OpSize;
-def IMULri32 : I2A32<"imul", 0x69, MRMSrcReg>;
-def IMULri16b : I2A8<"imul", 0x6B, MRMSrcReg>,     OpSize;
-def IMULri32b : I2A8<"imul", 0x6B, MRMSrcReg>;
+
+// These are suprisingly enough not two addres instructions!
+def IMULri16 : X86Inst<"imul", 0x69, MRMSrcReg, Arg16>,     OpSize;
+def IMULri32 : X86Inst<"imul", 0x69, MRMSrcReg, Arg32>;
+def IMULri16b : X86Inst<"imul", 0x6B, MRMSrcReg, Arg8>,     OpSize;
+def IMULri32b : X86Inst<"imul", 0x6B, MRMSrcReg, Arg8>;
 
 
 // Logical operators...


Index: llvm/lib/Target/X86/Printer.cpp
diff -u llvm/lib/Target/X86/Printer.cpp:1.76 llvm/lib/Target/X86/Printer.cpp:1.77
--- llvm/lib/Target/X86/Printer.cpp:1.76	Wed Jan 14 11:14:42 2004
+++ llvm/lib/Target/X86/Printer.cpp	Wed Feb  4 11:21:04 2004
@@ -666,8 +666,8 @@
     // ModR/M input.  The first two operands should be the same, post register
     // allocation.  This is for things like: add r32, r/m32
     //
-    // 3 Operands: in this form, we can have 'INST R, R, imm', which is used for
-    // instructions like the IMULri instructions.
+    // 3 Operands: in this form, we can have 'INST R1, R2, imm', which is used
+    // for instructions like the IMULri instructions.
     //
     // 2 Operands: this is for things like mov that do not read a second input
     //
@@ -678,7 +678,7 @@
              (MI->getOperand(2).isRegister() ||
               MI->getOperand(2).isImmediate())))
            && "Bad format for MRMSrcReg!");
-    if (MI->getNumOperands() == 3 &&
+    if (MI->getNumOperands() == 3 && !MI->getOperand(2).isImmediate() &&
         MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
       O << "**";
 





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